Block Diagram - Handset Section - Sony SPP-68 Service Manual

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SPP-68
6-2.
BLOCK DIAGRAM – HANDSET Section –
MIX, IF AMP, LIMITER AMP,
PLL, EXPANDER/COMPRESSOR
IC101
IC101 (1/2)
RX FREQUENCY:
46.61 – 46.97MHz
MIX1
IN1
B.P.F.
RF AMP
B.P.F.
40
BPF2
BPF1
Q1
1ST
ANT2
MIX
D101
LO OUT
43
RX
L102
VCO
(RX VCO)
RX VT
LO IN
44
CONTR
42
PD OUT
RX
46
PLL
RX SYSTEM B+
41
VCC2
L52
(TX VCO)
TX VT
MODULATOR
B.P.F.
TX AMP
TX VCO
BPF51
Q51
Q52
05
MIX1
CF102
MIX2
CF101
MIX2
IF
OUT
10.66MHz
OUT
460kHz
IN
IN
IF
QUADRATURE
36
34
32
38
AMP
DETECTOR
2ND
MIX
RSSI
LO1
3
LOCAL
LO2
OSCILLATOR
4
X101
10.22MHz
D51
COMP
FIL OUT
FIL IN
OUT
TX
9
10
11
SPLATTER
MUTE
PD
OUT
TX
47
PLL
TVCOIN
1
X501
4.048MHz
20
17
9 10
ROW1 – ROW5
29, 31 – 34
48
D501
TALK/
BATT LOW
– 21 –
FL101
(DET)
RX LEVEL
28
IC101 (2/2)
AF
PRE
OUT
IN
27
15
COMP
L.P.F.
IN
24
SIG
OUT
CARRIER
5
DETECTOR
RSSI
H/L
22
RV101
RSSI (H)
SENSITIVITY
MIC
MIC1
IN
TX
COMPRESSOR/
14
LIMITER
MIC AMP
28
45
3
46
SYSTEM CONTROLLER
IC501
COL0 – COL3
24 – 27
13
12
KEY MATRIX
HOLD/RESET
(SEET KEY)
SWITCH
Q501
B+
AMP
AMP
PREAMP
EXP
OUT
IN
19
OUT
RX
RECEIVER
EXPANDER
17
18
MUTE
AMP
20
AMP
DATA
OUT
COMP
DET
BATT
OUT
IN
CPU
BATTERY
21
33
INTERFACE
DETECT
23
7
6
8
B+
BATTERY LOW
SWITCHING
Q502
8
5 7 4
22
23
37
21
D504
D502
RESET
VOLTAGE
SWITCH
DETECT
Q201
IC201
MAIN
GROUND
GROUND ISOLATION
SWITCHING
Q202
B+
B+ SWITCH
TX SYSTEM B+
Q54
– 22 –
• SIGNAL PATH
: RX
: TX
: BELL
SP1
B+
BUZZER
BZ301
DRIVE
(BUZZER)
Q301
11
47
38
+
CHARGE
TERMINAL
D202
POWER
GROUND
BT901
RECHARGEABLE
BATTERY PACK
(BP-T16)

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