Casio CTK-750 Service Manual page 9

Gate Array (UPD65005C-578)
Functions of the gate array are;
(1) To decode chip select signals for the working strage RAM, the DSP and the key touch LSI.
(2) To hold the following signals on "Low" during power off.
Read/write enable signals for the DSP and the key touch LSI
10MHz clock for the key touch LSI
(3) To generate button scan / LED drive signals.
The following table shows the pin functions of the gate array.
Pin No. Terminal
1 -RESET
2 -RDAPO
3 -WRAPO
4 -LSIS
5 -HG
6 PHAPO
7 -SRAM
8 ~ 9 KO8 ~ KO9
10 ~ 17 KO7 ~ KO0
18 ~ 20
21 GND
22 PHA
23 -WR
24 -RD
25 -APO
26 KOC
27 KOD
28 ~ 39 A15 ~ A4
40, 41 D0, D1
42 VDD
A4 ~ A15
Address decoder
D0, D1
RD
WR
PHA
APO
KOD
KOC
RESET
In/Out
In Reset signal input
Out Read enable signal output
Out Write enable signal output
Out Chip select signal for the DSP
Out Chip select signal for the key touch LSI
Out 10MHz clock for the key touch LSI
Out Chip select signal for the working strage RAM
Not used.
Out Button scan / LED drive signal output
Not used.
In Ground (0V) source
In 10MHz clock input
In Write enable signal input
In Read enable signal input
In APO (Auto Power Off) signal input
In KO signal data input
In Clock for KO signal data
In Address bus
In Data bus
In +5V source
SRAM
RDAPO
WRAPO
Controller
PHAPO
KO0 ~ KO7
Shift register
Function
LSIS
(Chip select sigal for the DSP)
HG
(Chip select signal for the key touch LSI)
(Chip select signal for the working strage RAM)
(Read enable signal controlled by APO)
(Write enable signal controlled by APO)
(10MHz clock for the key touchLSI.
Controlled by APO)
(Button scan / LED drive signal)
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