JVC MX-GC5 Service Manual page 31

2. CD-MP3 1 Chip Block Diagram
DATX
Digital
Output
SDAT
Subc ode
SBCK
Output
LKFS
EFM
Demod.
Digital
EFMI
PLL
VCO1F
VCO
VCO2F
Digital
SMEF
CLV
SMDS
Servo
SMDP
SMON
CDP
ECC
EDC
BLOCK
ADPCM
ENC/ DEC
ESP DATA
Control TRANS
BLOCK
CD- ROM
CDP
BLOCK
Interpol .
SYNC
PROT.
16K
CD- ROM
SRAM
ECC
Adress
CD- ROM
Gen.
MICOM
REG.
FRAME
Sync Output
MEMORY I/ F
MEMORY
INTERNAL
CONTROL
MEMORY
BANK1
PCM DATA
I/ O
MAIN DATA PROCERROR
INTERFACE
MP3 Decoding ( MULTIPLIER & ADDER )
FRAME
ANCILLARY
SYNC DET HEAD
Side Infor. REGISTER
REGISTER
PROCESS
MP3
TIMING
DECODER
Generator
Controller
HEADER
OUTPUT
LPF
INTERNAL
MEMORY
PWM
BANK 2
1 Bit
DAC
Digital
Filter
DECODER
WRITE
DATA STATUS
REGISTER
REGISTER
Frequency MICOM
Synthesizer INTERFACE
FPLL MICOM
Interface Interface
LCHOUT
RCHOUT