Pioneer PDP-4270XA Service Manual page 195

5
Pin Function
2.15 Memory interface terminal
Acronyms Terminal number
SDRABP 4
SDRCLK 25
SDRCKE 21
SDRCS 20
SDRCAS 28
SDRRAS 22
SDRWE 29
SDRA0 19,18,15,14,
-SDRA11
13,12,10,9,8,
7,6,5
SDRDQ0 51,49,46,42,
-SDRDQ15 40,36,34,30,
31,35,37,41,
43,47,50,52
5
6
I/O Level Buffer type
PU/PD [kΩ]
O LVTTL 3 mA
3-state
O LVTTL 9 mA
3-state
O LVTTL 3 mA
3-state
O LVTTL 3 mA
3-state
O LVTTL 3 mA
3-state
O LVTTL 3 mA
3-state
O LVTTL 3 mA
3-state
O LVTTL 3 mA
3-state
I/O LVTTL 6 mA
3-state
PDP-427XD
6
7
Functions
All bank pre-charge output for external memory
(Active-High)
Clock output for external memory
Clock enable output for external memory
(Active-High)
Chip select output for external memory
(Active-Low)
Column address strobe output for external memory
(Active-Low)
Low address strobe output for external memory
(Active-Low)
Write enable output for external memory
(Active-Low)
Address output for external memory
Insert a damping resistor of approximately 100Ω,
and connect to the SDRAM address terminal.
Data input/output for external memory.
7
8
A
B
C
D
E
F
195
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