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QU01 : TMP86FH47UG
Block Diagram
Program memory
(Flash memory)
Flash memory I/F
Standby control
circuit
RESET
System control
TEST
circuit
Timing generator
XIN
High
Clock
frequency
XOUT
generator
Low
frequency
86FH47-4
P2
P22 to P20
Address/data bus
TLCS-870/C
Data memory
CPU
(RAM)
Interrupt controller
Time base
16-bit
timer
timer/counter
timer/counter
Watchdog
TC1
TC3
timer
Address/data bus
P1
P4
P0
P17 to P10
P47 to P40
P07 to P00
P37 to P30
I/O ports
TMP86FH47
TMP86FH47
Boot program
(ROM
)
8-bit
10
-bit AD
SIO
UART
converter
TC4
2003-09-10
P3
AVSS
AVDD
VAREF
52
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