Table of Contents
Advertisement
Schematic Diagrams
Haswell 2/7
Processor Pullups/Pull downs
D
H_PROCHOT#
H_CPUPWRGD_R
TRACE WIDTH 10MIL, LENGTH <500MILS
Sheet 3 of 58
If PROCHOT# is not used,
Haswell 2/7
then it must be terminated
with a 56-
resistor to 1.05VS_VTT .
C
+VCCIO_OUT
SSC CLOCK TERMINATION
STUFF R4R15 & R4R12
ONLY WHEN SSC CLOCK
NOT USED
B
Buffered reset to CPU
25,32
A
B - 4 Haswell 2/7
5
4
Haswell Processor 2/7 ( CLK,MISC,JTAG )
1.05V_LAN_M
R294
*0_04
+VCCIO_OUT
C491
*22u_6.3V_X5R_08
R33
62_04
R13
10K_04
C40
*0.1u_10V_X5R_04
H_PECI_ISO
R346
*10mil_short
26,39
H_PECI
+VCCST
H_PROCHOT#
H_PROCHOT#_D
R34
56_1%_04
44
H_PROCHOT#
H_THRMTRIP#
26
H_THRMTRIP#
R312
*100_04
1.05V_LAN_M
R345
*10mil_short
24
H_PM_SYNC
H_CPUPWRGD
R12
*10mil_short
H_CPUPWRGD_R
26
H_CPUPWRGD
PMSYS_PWRGD_BUF
VDDPWRGOOD_R
R115
0_04
CPU_RST_N_R
R348
0_04
26
PCH_PLTRST_CPU
BUF_CPU_RST#
R347
*0_04
R306
30
PCH_CK_DP_N
R307
+-5% pull-up
30
PCH_CK_DP_P
R302
30
PCH_SSC_N
R301
30
PCH_SSC_P
30
CLK_EXP_N
30
CLK_EXP_P
R300
*10K_04
PCH_SSC_P
PCH_SSC_N
R303
*10K_04
1.05V_LAN_M
3.3VS
R507
*1K_04
R511
BUF_CPU_RST#
R508
*43.2_1%_04
*10K_04
D
Q19A
2
G
*MTDN7002ZHS6R
S
D
5
G
Q19B
PLT_RST#
S
*MTDN7002ZHS6R
R527
*1.5K_1%_04
R526
C594
R509
*100K_04
*68p_50V_NPO_04
*20K_04
6,9,10,11,12,13,22,23,24,25,26,28,29,30,31,32,34,35,36,37,39,40,44,45
5
4
3
+VCCST
C489
*22u_6.3V_X5R_08
U15B
Haswell rPGA EDS
SKTOCC#
AP32
MISC
AP3
SM_RCOMP_0
SKTOCC
SM_RCOMP_0
AR3
SM_RCOMP_1
H_CATERR#
SM_RCOMP_1
SM_RCOMP_2
AN32
AP2
CATERR
SM_RCOMP_2
AR27
AN3
CPUDRAMRST#
PECI
SM_DRAMRST
AK31
FC
AM30
AR29
XDP_PRDY#
PROCHOT
PRDY
AM35
AT29
XDP_PREQ#
THERMTRIP
PREQ
XDP_TCLK
AM34
TCK
XDP_TMS
AN33
TMS
XDP_TRST#
AM33
TRST
AT28
AM31
XDP_TDI_R
PM_SYNC
TDI
AL34
AL33
XDP_TDO_R
PWRGOOD
TDO
XDP_DBR_R
AC10
AP33
SM_DRAMPWROK
DBR
AT26
PLTRSTIN
XDP_BPM0
AR30
BPM_N_0
AN31
XDP_BPM1
BPM_N_1
*10mil_short
G28
AN29
XDP_BPM2
DPLL_REF_CLKN
BPM_N_2
XDP_BPM3
*10mil_short
H28
AP31
DPLL_REF_CLKP
BPM_N_3
XDP_BPM4
*10mil_short
F27
AP30
SSC_DPLL_REF_CLKN
BPM_N_4
XDP_BPM5
*10mil_short
E27
AN28
SSC_DPLL_REF_CLKP
BPM_N_5
D26
AP29
XDP_BPM6
BCLKN
BPM_N_6
E26
AP28
XDP_BPM7
BCLKP
BPM_N_7
2 OF 9
H_PROCHOT#
Q8
G
C398
39
H_PROCHOT#_EC
MTN7002ZHS3
R264
47p_50V_NPO_04
100K_04
CAD Note: Capacitor need to be placed
close to buffer output pin
S3 circuit:- DRAM_RST# to memory
should be high during S3
V_VDDQ_DIMM
R380
1K_04
R384
*0_04
Q14
MTN7002ZHS3
CPUDRAMRST#
S
D
R381
1K_04
DRAMRST_CNTRL
R386
C539
4.99K_1%_04
0.047u_10V_X7R_04
4,5,9,10,11,42
V_VDDQ_DIMM
5,6
+VCCIO_OUT
5,28,29,43,45
1.05V_LAN_M
2,13,20,22,24,26,27,28,29,30,31,32,33,34,37,40,42,45,46
3.3V
3.3VS
3
2
1
DDR3 Compensation Signals
SM_RCOMP_0
R174
100_1%_04
SM_RCOMP_1
R173
75_1%_04
SM_RCOMP_2
R175
100_1%_04
PU/PD for JTAG signals
XDP_TMS
R314
51_04
XDP_TDI_R
R36
51_04
XDP_PREQ#
R344
*51_04
XDP_TDO_R
R313
51_04
XDP_TDO_R
R35
*100_04
XDP_TCLK
R25
51_04
XDP_TRST#
R24
51_04
XDP_DBR_R
1K_04
S3 circuit:- DRAM PWR GOOD lCIRCUIT
3.3V
3.3V
C558
V_VDDQ_DIMM
R458
R459
R433
1K_1%_04
1
24
PM_DRAM_PWRGD
4
2
U24
*MC74VHC1G08DFT1G
R437
2K_1%_04
R436
0_04
DDR3_DRAMRST#
9,10,11
4,23
Q15
G
36,40,42,43
SUSB
*MTN7002ZHS3
! ! ! !!DMFWP!DP/
! ! ! !!DMFWP!DP/
! ! ! !!DMFWP!DP/
Title
Title
Title
[03] Haswell 2/7-CLK/MISC
[03] Haswell 2/7-CLK/MISC
[03] Haswell 2/7-CLK/MISC
Size
Size
Size
Document Number
Document Number
Document Number
6-71-W3S50-D02A
6-71-W3S50-D02A
6-71-W3S50-D02A
A3
A3
A3
Date:
Date:
Date:
Friday, January 10, 2014
Friday, January 10, 2014
Friday, January 10, 2014
Sheet
Sheet
Sheet
2
1
D
1.05V_LAN_M
C
3.3VS
R23
B
PMSYS_PWRGD_BUF
R429
R434
*39_04
*100K_04
A
Rev
Rev
Rev
1.0
1.0
1.0
3
3
3
of
of
of
58
58
58
Hide quick links:
Advertisement
Chapters
Table of Contents
