Ic Block Diagrams - Aiwa CDC-R937 Service Manual

CDC-R937/X937

4-15. IC BLOCK DIAGRAMS

IC201 LA6557H-TE-L (SERVO Board)
28 27 26 25 24 23
SYSTEM
INPUT MUTE
THERMAL
SHUTDOWN
OUTPUT
LEVEL SHIFT LEVEL SHIFT
CONTROL
CH5 CH4 CH3
CH3,4,5
POWER
1 2 3 4 5 6
IC221 TA2153FN (SERVO Board)
RFN2 GND RFO AGCIN GVSW
30 29 28 27 26
AGC
AMP
1 2 3 4 5
VCC RFGC GMAD FNI FPI
TAB2
22 21 20 19 18 17 16 15
SIGNAL
POWER
LEVEL SHIFT LEVEL SHIFT
CH2 CH1
CH1,2
POWER
7 8 9 10 11 12 13 14
TAB1
RFGO RFRPIN PKC RFCT BTC RFRP VRO SEB FEN FEO
25 24 23 22 21 20 19 18 17 16
PEAK BOTTOM
3
I-I I-I
STATE
DET.
I I
6 7 8 9 10 11 12 13 14 15
TPI TNI MDI LDD SEL TEB 2VRO TEN TEO SBAD
IC151 SAA6579T-T (MAIN Board)
CL T57
16 15
QUALITY BIT
GENERATOR
DIFFERENTIAL
DECODER
1 2
QUAL RDDA
IC401 LA2657M (MAIN Board)
64 63 62
AUX(L) 1
EVR
CH(L) 2
F-SW
TUNE(L) 3
CD(L)
4
VREF 5 V REF
CH(R) 6
TUNE(R) 7
F-SW
CH(R) 8
AUX(R)
9
NC 10
11
RSELO
RIN 12 EVR
RTRE 13
TONE
RBASS 14
S BASS
NC 15
RBASS2 16
17 18 19
34 34
XOUT XIN VDD GND TEST MODE
14 13 12 11 10
TEST LOGIC AND OUTPUT
SELECTOR SWITCH
OSCILLATOR 57kHz ANTI-
RECONSTRUCTION
AND BANDPASS ALIASING
FILTER
DIVIDER (8TH ORDER) FILTER
BIPHASE
COSTAS LCOP
CLOKED
SYMBOL
VARIABLE AND
COMPARATOR
DECODER FIXED DIVIDER
CLOCK REGENERATION
AND SYNC
VP1
REFERENCE
VOLTAGE
3 4 5 6 7
VREF MUX VDD GND CIN SCOUT
61 60 59 58 57 56 55 54 53 52
TONE
FADER
S BASS
BBE
SW
VREF
BBE
20 21 22 23 24 25 26 27 28 29
9
8
51 50 49
48 NC
CCB INTERFACE
47
VDD
46
RROUT
FADER
45 FROUT
44 BBE IN(L)
43
CBPL
42 LC3
41 HPOL
BBE
40 CLPL
39
NC
38
LPOL
37 MIXL
36
BBE OUT(L)
35 BBE OUT(R)
MIXR
34
NC
33
30 31 32