Yamaha RX-V2600 Service Manual page 112

A B C
RX-V2600/DSP-AX2600
SCHEMATIC DIAGRAM (D-VIDEO 1/2)
1
2
3
4
0.4
5
3.4
2.8
2.2
1.9
0
0
3.4
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
HDMI TRANSMITTER
0.1
1.9
0
6
7
5.1 0
1.9
1.9
5.1
5.1 3.4
8
9
IC301, 302: SN74CBT3306PWR IC305: SN74AHC2GU04HDCTR
FET Bus Switch Triple Inverters
1OE 1 8 Vcc 1A 1 8 VCC
1A 2 7 2OE
3Y 2 7 1Y
3 6
1B 2B
2A 3 6 3A
GND 4 5 2A
GND 4 5 2Y
# All voltages are measured with a 10MΩ/V DC electronic volt meter.
# Components having special characteristics are marked s and must be replaced
10 with parts having specifications equal to those originally installed.
# Schematic diagram is subject to change without notice.
112
D E F
3.4
0
0
0.1
0
5.1 5.1
5.1 7.3
5.1 7.3
0 0
0 0
7.3
5.1 5.1 3.4
3.4
3.4 3.4
0
3.4
3.4 1.9
0.1 0
0.1 3.4
1.9
0
0 0.1
0 1.9
3.4 0
0.1 0.2
0.1 0.2
0.2 0.2
0.2 0.2
0.2 0.1
0.2 0.1
0.1 0.1
0.1 0.1
1.9 3.4
0
3.4 0
0 1.9
1.8
1.8
1.8
1.8 1.7
0
B-2
1.8
1.7
3.4
3.4
0
3.4
3.4
0.1
1.9
0
0.1
0
POINT B-2 Pin 96 of IC309
Page 103 I3
to FUNCTION (1)_CB314
IC303, 304: 24LC04BT-I/SN IC306: LE50ABD
Serial EEPROMs VOLTAGE REGULATORS WITH INHIBIT
WP 8
HV GENERATOR V IN
CURRENT
I/O MEMORY EEPROM ARRAY LIMIT
(2 x 256 x 8) or
CONTROL CONTROL
XDEC (4 X 256 X 8)
LOGIC LOGIC
INHIBIT 5 START REFERENCE
PAGE LATCHES
CONTROL INHIBIT VOLTAGE ERROR DRIVER
AMPLIFIER
SDA SCL
YDEC TERM. PROTEC.
V CC SENSE AMP
R/W CONTROL
V SS 3, 4, 6, 7
GND
IC307: SN74LVC1G125DCKR IC314: SN74AHCT1G125DCKR
Single Bus Buffer Gate Single Bus Buffer Gate
OE 1 5 VCC OE 1 5 VCC
A 2 A 2
GND 3 4 Y GND 3 4 Y
G H I
4.3
4.1 5.1
5.1
0.1
0
4.3
0
5.1
4.3 0
0 0
0
5.1
0
1.9
0.1
0.1
4.3
5.1
4.3
5.1
2.8
2.2
HDMI DUAL RECEIVER
3.4
0
0
1.9
1.9
0
0
3.4
0
3.4
3.4
0
3.4
3.4
0
3.4
0.1
0
0
3.4
3.4
3.4
0
3.4
0
0.1
IC310: PCA9540BDP IC311: SN74LVC245APWR
2
2-channel I C multiplexer Octal Bus Transceivers with 3-state Outputs
V SD0 5
1 OUT DIR 1 20 Vcc
SD1 7
A1 2 19 OE
SC0 4
SC1 8
A2 3 18 B1
SWITCH CONTROL LOGIC
V SS 6 A3 4 17 B2
Power-on
V DD 3 A4 5 16 B3
Reset
A5 6 15 B4
SCL A6 7 14 B5
1 Input 2
I C-Bus
Filter
SDA 2 Control
A7 8 13 B6
A8 9 12 B7
GND 10 11 B8
J K
IC508 (D-VIDEO 2/2): W9864G2EH-7
512K x 4 Banks x 32 Bits SDRAM
CLK
CLOCK
BUFFER
CKE
CS
RAS
COMMAND
DECODER
CAS
WE
A10
A0
ADDRESS
A9 BUFFER
BS0
BS1
REFRESH
COUNTER
0.6
0.7
3.4
0
0.7
0
4.3
5.1
3.4 3.4
IC509 (D-VIDEO 2/2): W9816G6CH -7
0.7
0
512K x 2 Banks x 16 Bits SDRAM
0
0.1 0.1
CLK 35
CLOCK
BUFFER
CKE 34
CS 18
RAS 17
COMMAND
CAS 16 DECODER
WE 15
A10 20
5.1 0
4.3 0
0 0
0 A0 21
5.1
ADDRESS
A3 24
BUFFER
A4 27
A9 32
BA 19
REFRESH
COUNTER
4.2
0
5.1
4.3 0
5.1 0
2.8 4.3
2.2 5.1 IC308: SiI9030CTU
3.4
HDMI Transmitter
4.2
5.1
5.0
0
0.1
0
0
IC309: SiI9031
HDMI Receiver
D-VIDEO
IC312: µPC37M31TJ-E1-AZ
TWO-OUTPUT POSITIVE VOLTAGE REGULATORS
1 INPUT
+
Error
Amp.
-
4 OUTPUT 1
NC
2
GND
3, 6(Fin)
+
Error
Amp.
-
5 OUTPUT 2
L M N
CONTROL
SIGNAL
GENERATOR
COLUMN DECODER COLUMN DECODER
CELL ARRAY CELL ARRAY
BANK #0 BANK #1
MODE
REGISTER
SENSE AMPLIFIER SENSE AMPLIFIER
DQ0
DATA CONTROL DQ
CIRCUIT BUFFER
DQ31
COLUMN
COUNTER DQM0–3
COLUMN DECODER COLUMN DECODER
CELL ARRAY CELL ARRAY
BANK #2 BANK #3
SENSE AMPLIFIER SENSE AMPLIFIER
CONTROL COLUMN DECODER
SIGNAL R
GENERATOR O
W
D CELL ARRAY 2 DQ0
E
BANK #0
C
3 DQ1
O
D
E 5 DQ2
R
6 DQ3
SENSE AMPLIFIER
8 DQ4
9 DQ5
MODE 11 DQ6
REGISTER
12 DQ7
REFRESH DQ
COUNTER BUFFER 39 DQ8
40 DQ9
42 DQ10
43 DQ11
45 DQ12
46 DQ13
COLUMN
COLUMN DECODER
48 DQ14
COUNTER
R
49 DQ15
O
W
D CELL ARRAY
E BANK #1
C
O
D
E
14 LDQM
R
SENSE AMPLIFIER 36 UDQM