Sanyo VPC-C5 Service Manual page 4

1-2. CP1, VF1 and TB1 CIRCUIT DESCRIPTION
1. Circuit Description
1-1. Digital clamp
The optical black section of the CCD extracts averaged val-
ues from the subsequent data to make the black level of the
CCD output data uniform for each line. The optical black sec-
tion of the CCD averaged value for each line is taken as the
sum of the value for the previous line multiplied by the coeffi-
cient k and the value for the current line multiplied by the
coefficient 1-k.
1-2. Signal processor
1. γ correction circuit
This circuit performs (gamma) correction in order to maintain
a linear relationship between the light input to the camera
and the light output from the picture screen.
2. Color generation circuit
This circuit converts the CCD data into RGB signals.
3. Matrix circuit
This circuit generates the Y signals, R-Y signals and B-Y sig-
nals from the RGB signals.
4. Horizontal and vertical aperture circuit
This circuit is used gemerate the aperture signal.
1-3. AE/AWB and AF computing circuit
The AE/AWB carries out computation based on a 64-segment
screen, and the AF carries out computations based on a 6-
segment screen.
1-4. SDRAM controller
This circuit outputs address, RAS, CAS and AS data for con-
trolling the SDRAM. It also refreshes the SDRAM.
1-5. Communication control
1. SIO
This is the interface for the 8-bit microprocessor.
2. PIO/PWM/SIO for LCD
8-bit parallel input and output makes it possible to switch be-
tween individual input/output and PWM input/output.
1-6. TG/SG
Timing generated for 5 million pixel horizontal addtion CCD
control.
1-7. Digital encorder
It generates chroma signal from color difference signal.
2. Outline of Operation
When the shutter opens, the reset signals (ASIC and CPU)
and the serial signals ("take a picture" commands) from the
8-bit microprocessor are input and operation starts.
When the TG/SG drives the CCD, picture data passes through
the A/D and CDS, and is then input to the ASIC as 10-bit
data. The AF, AE, AWB, shutter, and AGC value are com-
puted from this data, and three exposures are made to obtain
the optimum picture. The data which has already been stored
in the SDRAM is read by the CPU and color generation is
carried out. Each pixel is interpolated from the surrounding
data as being either R, G, and B primary color data to pro-
duce R, G and B data. At this time, correction of the lens
distortion which is a characteristic of wide-angle lenses is
carried out. After AWB and γ processing are carried out, a
matrix is generated and aperture correction is carried out for
the Y signal, and the data is then compressed by JPEG and
is then written to card memory (SD card).
When the data is to be output to an external device, it is taken
data from the memory and output via the USB I/F. When played
back on the LCD and monitor, data is transferred from memery
to the SDRAM, and the image is then elongated so that it is
displayed over the SDRAM display area.
3. LCD Block
During EE, gamma conversion is carried out for the 12-bit
RGB data which is input from the A/D conversion block of the
CCD to the ASIC in order that the γ revised can be displayed
on the video. The YUV of 640 x 480 is then transferred to the
SDRAM.
The data which has accumulated in the SDRAM is converted
to digital YUV signal in conformity to ITUR-601 inside the ASIC
by SDRAM control circuit inside the ASIC, the data is sent to
the LCD driver IC and displayed the image to LCD panel.
If the shutter button is pressed in this condition, the 12-bit
data which is output from the A/D conversion block of the
CCD is sent to the SDRAM (DMA transfer), and is displayed
on the LCD as a freeze-frame image.
During playback, the JPEG image data which has accumu-
lated in the SD card is converted to YUV signals. In the same
way as for EE, the data is then sent to the SDRAM, con-
verted to digital YUV signal in conformity to ITUR-601 inside
the ASIC, the data is sent to the LCD driver IC and displayed
the image to LCD panel.
The LCD driver is converted digital YUV signals to RGB sig-
nals from ASIC, and these RGB signals and the control sig-
nal which is output by the LCD driver are used to drive the
LCD panel. The RGB signals are 1H transposed so that no
DC component is present in the LCD element, and the two
horizontal shift register clocks drive the horizontal shift regis-
ters inside the LCD panel so that the 1H/1V transposed RGB
signals are applied to the LCD panel.
Because the LCD closes more as the difference in potential
between the VCOM (common polar voltage: AC drive) and
the R, G and B signals becomes greater, the display becomes
darker; if the difference in potential is smaller, the element
opens and the LCD become brighter. In addition, the bright-
ness and contrast settings for the LCD can be varied by means
of the serial data from the ASIC.
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