LG MG230 Service Manual page 13

3. TECHNICAL BRIEF
F. Feedback Down-Converting Mixer
The feedback down converting mixer is used to translate the TX VCO output frequency to the TX IF.
An integrated band pass filter exists between the mixer and the PFD to filter the mixers unwanted side
band and higher order mixing products.
G. Transmit Frequency Plan
Unlike many other translation loop modulators the AD6548 uses only a single VCO source to derive
the local oscillator signal for both the Feedback Down-Converting Mixer and the Quadrature
modulator. Therefore there is a fixed relationship between the Tx IF frequency and the LO VCO
frequency .This ratio was chosen to minimize VCO tuning range, TX IF frequency variation and ensure
excellent transmit spectral mask performance. The Feedback-Down Converting Mixer operates low
side injection for the high bands and high side injection for the low bands. The final relationship
between the transmitted TX frequency and the LO VCO frequency is different between the two bands.
These relationships are taken account of in the synthesizer architecture and programming.
H. Main Frequency Synthesizer
The AD6548/9 has a single fast-locking fractional synthesizer used for VCO control in both receive and
transmit mode. The entire system including VCO, tank, fractional N dividers, sigma delta
compensation, charge pump and loop filters are fully integrated. The only external component is a low
cost crystal for the reference. The synthesizer is controlled via the serial interface. The VCO is fed into
the respective dividers to generate the appropriate LO frequencies for the RX and TX bands.
I. Fractional N Dividers
The fractional N divider allows the PLL system to have a smaller step size than the comparison
frequency which is set by the external reference to 26 MHz. This feature allows all the GSM frequency
band rasters to be achieved, with fast lock times and good phase noise characteristics. The divider
section consists of a dual modulus 8/9 pre-scaler, integer M & A dividers, and fractional N system
based on sigma-delta modulation to generate the required fractional divide ratio. The Denominator of
the fractional divider can be set to 3 different values, (1040, 1170,1235), depending on the mode of
operation. For example a denominator of 1040 with an input fraction F maintains an average value of
F/1040 allowing 25 kHz steps when operated at a reference of 26 MHz.
J. Phase Frequency Detector/Charge Pump
A Phase Frequency Detector (PFD) is used for the PLL phase detector. The charge pump is designed
such that good matching of up and down currents is achieved over a wide output operating range. The
charge pump output is internally routed to the integrated synthesizer loop filter.
K. Synthesizer Loop filter
To minimize complexity of the external PCB layout the Main Synthesizer loop filter is also fully
integrated into the IC. No external components or adjustments are required.
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Only for training and service purposes