8254 Timer/Counter - Omega ISA- BUS MULTI-FUNCTIONAL BOARD OME-A822PG Hardware Manual

2.6 8254 Timer/Counter

The 8254 Programmable timer/counter has 4 registers from Base+0 through Base+3. For
detailed programming information about the 8254 , please refer to Intel's "Microsystem
Components Handbook".The block diagram is shown below.
CN3.33
CN3.37
Cin : clock input
Cout : clock output
INTCLK : internal clock
CN3 : connector CN3
4M 2M
INTCLK
The counter0, counter1 and counter2 are all 16 bit counters. Counter 1 and counter 2 are
cascaded as a 32 bit timer. This 32 bit timer is used as a pacer timer. The software driver,
A-822_Delay(), uses counter 0 to implement a machine independent timer for settling
time delay (sec. 2.4.6 and sec. 2.4.7). If A-822_Delay() is not used, counter0 can be used as
a general purpose timer/counter.
NOTE : When using A-822_Delay() to implement a machine
independent timer, the JP6 jumper must be set to internal 2M
clock.
JP6
Cin
2M
PACER CLK
Counter 1
Cin
Counter 2
Cin
OME-A-822PGL/PGH Hardware Manual ---- 26
VCC
10K
Gate
Cout
Counter 0
Cout
Gate
Cout
Gate
CN3.16
CN3.35
VCC
10K
CN3.34