Nokia rx-34 Service Manual page 199

RX-34
System Module
Figure 70 WLAN RF block diagram
STL4550 implements 802.11b/g WLAN radio for embedded, low power and small form factor mobile
applications.
STLC4550 is a three-die multichip module. The system implementation is partitioned to radio, baseband and
energy management dies.
STLC4550 has a fully integrated radio chip including a direct-conversion transceiver, RF synthesizer and VCO,
and high-speed data converters.
The baseband includes required logic and interfaces to enable simultaneous use of BT and WLAN.
The energy management chip integrates required power management functions to operate the system from
VBAT (3.0 – 5.5 V). In default configuration the chip has SMPS to generate 1.2 V digital core voltage, two 1.8
V LDOs for RF and 2.8 V LDO for PA bias supply.
The EM chip also integrates power-on reset circuitry and level-shifters for RF front-end GaAs switches.
Host interface is provided by a flexible serial interface (SPI) supporting clock frequency upto 60 MHz. The
system uses 19.2 or 38.4 MHz reference clock from the cellular system as the reference.
RF5924 Front-End Module (FEM) implements amplification of the transmit signal to required power levels.
FEM is connected to VBAT and it has integrated b/g power amplifier, power detector, RX balun, and TX filtering.
Also, it is capable of switching between WLAN RX, WLAN TX and BTH RX/TX operations. .
Synthesizer
The PLL synthesizer with VCO is integrated into RFIC, only the loop filter is needed outside the RFIC.
Antenna
Antenna is an SMD component.
Issue 2 COMPANY CONFIDENTIAL Page 9 –19
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