Dt-Board Block Diagram - Panasonic TH-42PD50U Service Manual

13.19. DT-Board Block Diagram

DT
ATSC INTERFACE
IC8202
D_A_SW
H DIGITAL
SERIAL SW
L ANALOG
Q8217 13
5
Q8218
6
IF_SW
IC8203
H ON 12
L OFF
L/H CHECK
2 O/I I/0 1
IF_SW
CONT 4
TU8200
TV TUNER
IC8232
D_A_SW
AGC
8
AUDIO INPUT SW(D/A)
H DIGITAL
SCL
L ANALOG
10
SDA
13
9
AFT
AFT
11
Q8219 5
AGC OUT
12
VIDEO_OUT
VIDEO_OUT
6
13
L_OUT
16
12
R_OUT
15
IF_OUT
19
IF_SW
20 30V
ANALOG_R
BTL
4 ANALOG_L
ANT_V_SUPPLY
A5V
2
V_SUPPLY
7
BV
18
IC8241
SUB 5V
DC-DC CONV.3.3V
5
VCC
1 BOOT
12
SD ISEN
IC8242
SUB 5V
DC-DC CONV.1.2V
IC8235
5 VCC
3.3V +2.5V
AVR +2.5V
1 BOOT
6 1
VDD VOUT
12 SD ISEN
3 CE
TH-42PD50U
DT-Board Block Diagram
IC8205
IC8204
AGC AMP
L/H CHECK
6
2 O/I I/0 1 7
5
D_A_SW
CONT 4
3
1
D_A_SW
2
H ON
L OFF
IC8206
AGC AMP(IF STRIP)
SDA_FE
1
XF8200
2
2
3 X9303P
SDA_TV 3
4
SCL_TV 4
AGC CTL
8
9
10
SCL_FE
11
D_A_SW
Q8220
IC8201 IC8200
OP AMP AUDIO DAC
2
DL
1
11 AOUTL
3
5 SUB 9V
DR
10 AOUTR
1
7
L_OUT
6
2
3
L_OUT
4
IC8009,IC8010
R_OUT
8
R_OUT
9 256M DDR_SDRAM
10
11
IC8222
128M WORK CPU SDRAM
X8005
SUB 9V
HG 14
Q8221 3.3V(1.8A)
S1 G1 D1
S2 G2 D2
IC8223
7
64M CPU FLASH ROM
LG 2
10
FB
XRST
SD CARD SLOT
SUB 9V
HG 14
1.2V(1.5A)
Q8222
S1 G1 D1
S2 G2 D2
7
LG 2
FB 10
IC8211
FRONT PROCESSOR(TERRESTRIAL RECEIVER)
53 RF_AGC SDA
54 IF_AGC SCL
SDA_FE
62 OBMSDA
SCL_FE
TDO
63 OBMSCL
TCK
IC8207 JTAG
TMS
35 XO
X8200
TRST
AGC AMP(IF STRIP)
36 XI
TDI
XF8201
OUT1 OUT1
FAT_P NRST
7 2 7 39 FAT_P
X9351P
MPEG_DATA
FAT_N
6 3 6 40 FAT_N
OUT2
OUT2 MPEG_DATA_EN
4 FDC_CONT
AGC CTL 176
MPEG_PKT_SYNC
MPEG_CLK
IC8240
HDSL PEAKS_Lite
ADIN
ADIN
SLRCK
SLRCK
PDWN
PDWN
5
PDN DACRST
MCLK 1 DACCK
BICK 2 SRCK
SDTI DMIX
3
LRCK 4 LRCK
MMDQ0
DATA BUS
MMDQ31
MMA0
ADDRESS BUS
MMA13
CONTROL BUS
IC8022
AUDCLK
PEAKS_Lite(3/3)
VCX0
PEAKS_Lite(1/3)
1 X1 VIN 4 VC27
74M 7 CLK74
16 9
X2 27M MCK27
133M 10
24.576M 11
XWP
CONTROL BUS(NAND I/F) ALE
CLE
RE
WE
ED16
DATA BUS
ED31 BOOT ROM I/F
EA1
ADDRESS BUS
EA22
XECS0
CONTROL BUS
XERE
XEWE2
DT09
DATA0 7 SD_DATA0
DATA1 8 SD_DATA1
DATA2
9 SD_DATA2
DATA3
1 SD_DATA3
CMD SDCMD
2
CLK 5 SDCLK
D_SW PEAKS_Lite(2/3)
SDCD
WP SDWP
VDD12 VDD33 AAVDD DAVDD MAVDD SVAVDD
1.2V 3.3V
75
IC8229
EEPROM DIGITAL AUDIO OUT
D8208
87 5 SDA 3.3V
88 6
SCL
TD_PEAKS
133
TCK SCL1
134
TMS SDA1
135
SCL1
TRST
136
SDA1
TDI
137
XFE_RST
68
SER_DATA
106
MPEG_DATA_EN
94
MPEG_PKT_SYNC
91
MAIN_SW
MPEG_CLK
108
H ANALOG
L DIGITAL
IC8244
16Bit AUDIO A/D
ADIN
9 SDTO AINR 1
IC8230 SLRCK
10 LRCK AINL 2
PDWN
PDN
13
BUS SWITCH
IEC_OUT
MVY0 20 29
MVY0 MVY7
MVY7 11 37
10 38
MVC0
MVC0 MVC7
MVC7 2 46
21
MHSYNC0 28
MVSYNC0 22 27
MVCLK0 23 26
Q8216
47 48
H OUT
L STOP
Q8209
DC
DY
XSRQ
SCL0 SCL0
SDA0
SDA0
A5V
SCL1 SCL1
SDA1 SDA1
TDO
TD0
JTAG I/F TD_PEAKS
TDI
Joint TMS
TMS
Test
TCK
TCK
Action
Group
XFERST IC8227
XFE.RESET
SER_DATA
SCHDATA0 RESET
MPEG_DATA_EN
ENABLE0
MPEG_PKT_SYNC
4
OUT VDD
PSYNC0
MPEG_CLK
SCHCLK0
POWER_DET
IC8228
POWER_DET
SD_BOOT
SD_BOOT
RESET
XRST
XRST
1 VOUT VDD
SBO1
SBO1
SBI1 XRST
SBI1
SBO0
SBI0 SUB 5V
DT07
2.5V
VDDQ 1 +5V
(DDR SDRAM)
MVAVDD AVDD
2 SBI0
2.5V 3 SBO0
TH-42PD50U
DT-Board Block Diagram
TH-42PD50U
DT12
TO DG22
TCK
26 TCK
TMS
27 TMS
TDO
28 TDO
TDI
29 TDI
TRST
30 TRST
SCL1
32 SCL1
SDA1
33 SDA1
SDA_TV
SDA_TV
34
(SDA0B)
SCL_TV
35 SCL_TV
AFT (SCL0B)
37 AFT(AFT1)
MAIN_SW
36 MAIN_SW
R_OUT
43 R_OUT
L_OUT
L_OUT
41
MAIN_R
58 MAIN_R
MAIN_L
60 MAIN_L
VIDEO_OUT
13 VIDEO_OUT
88 MVY0
96 MVY7
97
MVC0
105 MVC7
MHSYNC0
107
106 MVSYNC0
109 MVCLK0
VOUTENB
20
47 DC(BS_C)
45 DY(BS_Y)
SRQ
23
POWER_DET POWER_DET
15
(SW_OFF)
SDBOOT
SDBOOT
16
XRST
22 XRST
SBO1
18 SBO1(SBI1)
SBI1
SBI1(SBO1)
19
30V
FDC_A5V
8 30V(BT30V)
SUB 9V SUB 9V
51
52 SUB 9V
SUB 5V
53 SUB 9V
54 SUB 5V
57 SUB 5V
3.3V
2
SUB 9V
2