Diagrams; Ic Pin Descriptions - Sony D-NE510 Service Manual

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D-NE510/NE511/NE518CK
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5-1. IC PIN DESCRIPTIONS

• IC601 CXD3048R (RF AMP, DIGITAL SIGNAL PROCESSOR, DIGITAL SERVO PROCESSOR, D-RAM CONTROLLER)
Pin No.
Pin Name
1
XRAS
2
XWE
3 to 6
D1, D0, D3, D2
7
DCLK
8
DCKE
9
XCAS
10
WFCK/DQM
11 to 13
A9 to A7
14
DVSS
15 to 17
A6 to A4
18
XRDE
19
VDD0
20
CLOK
21
SDTO
22
SENS
23
XLAT
24
XSOE
25
SYSM
26
WDCK
27
SCOR
28
XRST
29
PWMI
TE
L 13942296513
30
XQOK
31
XWRE
32
R8M
33
VSS0
34
SQCK
35
SCLK
36
SQSO
37
XEMP
38
XWIH
39
SBSO
40
EXCK
41
XTSL
42
HVSS
43
HPL
44
HPR
45
HPVDD
46
XVDD
47
XTAI
48
XTAO
49
XVSS
50
AVDD1
51
AOUT1
52
VREFL
www
53, 54
AVSS1, AVSS2
55
VREFR
56
AOUT2
.
57
AVDD2
8
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SECTION 5

DIAGRAMS

I/O
O
Low address strobe signal output to the D-RAM
O
Data input enable signal output to the D-RAM
I/O
Two-way data bus with the D-RAM
O
Not used (open)
O
Not used (open)
O
Column address strobe signal output to the D-RAM
O
Not used (open)
O
Address signal output to the D-RAM
Ground
O
Address signal output to the D-RAM
I
D-RAM read enable signal input
Power supply
I
Serial data transfer clock signal input from TMP91CW28FG
I
Serial data input from TMP91CW28FG
O
Serial data output to TMP91CW28FG
I
Serial data latch pulse signal input from TMP91CW28FG
I
Serial data output enable signal input from TMP91CW28FG
I
Analog muting on/off control signal input from TMP91CW28FG "H": muting on
O
Not used (open)
O
Subcode sync (S0+S1) detection signal output to TMP91CW28FG
I
Reset signal input from TMP91CW28FG "L": reset
I
Not used (open)
I
Not used (open)
I
Not used (open)
O
System clock output to TMP91CW28FG
Ground
I
SQSO readout clock signal input Not used (fixed at "H")
I
SENS serial data read clock signal input Not used (fixed at "H")
O
Not used (open)
O
Not used (open)
O
Not used (open)
O
Not used (open)
O
SQSO readout clock signal output Not used (pull down)
I
Input terminal for the system clock frequency setting (pull down)
Ground
O
Not used (open)
O
Not used (open)
Power supply
Power supply
I
System clock input (16.934 MHz)
O
System clock output (16.934 MHz)
Ground
Power supply
O
L-ch analog audio signal output
O
L-ch reference voltage output
Ground
x
ao
u163
O
R-ch reference voltage output
y
O
R-ch analog audio signal output
i
Power supply
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2 9
8
Pin Description
Q Q
3
6 7
1 3
1 5
co
.
9 4
2 8
0 5
8
2 9
9 4
2 8
m
9 9
9 9

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