Sony D-NE510 Service Manual page 11

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• IC701 CXR710 (SOUND PROCESSOR)
Pin No.
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10
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L 13942296513
24
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46
www
47
48
49
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50 TACK (TEST6)
51 XOUT (TEST5)
52 TRST (TEST4)
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Pin Name I/O
LRCH I D/A I/F L/R clock input from CXD3048
BCK I D/A I/F bit clock input from CXD3048
VDIOCD0 — Power supply (+2.0 V)
PCMD I D/A I/F serial data input from CXD3048
DVDD4 — Power supply (+1.5 V)
TAPTDO O Debug signal output
SCANEN I Not used (fixed at "L")
DVDD0 — Power supply (+1.5 V)
DVSS0 — Ground
VDIO0 — Power supply (+2.0 V)
VDIOCD1 — Power supply (+2.0 V)
PF4 I XRDE monitor signal input from CXD3048
PI3 O D/A I/F bit clock output to CXD3048
PI2 O D/A I/F L/R clock output to CXD3048
PI0 O D/A I/F serial clock output to CXD3048
EVA I Mode select input terminal
KCLK O Not used (open)
KSC O Not used (open)
VDIO1 — Power supply (+2.0 V)
KDI O Not used (fixed at "L")
KDO I Not used (fixed at "L")
KRB I Not used (open)
DVDD1 — Power supply (+1.5 V)
DVSS3 — Ground
AVDPLL — Power supply (PLL) (+2.6 V)
AVSPLL — Ground (PLL)
AVSOSC — Ground
AVDMO — Power supply (+2.6 V)
EXTAL I System clock input (22 MHz)
XTAL O System clock output (22 MHz)
XIN I System clock input (22 MHz)
OSSEL I Input terminal for clock frequency setting (fixed at "L")
NRST I Reset signal input
PF0 I Interrupt signal input to TMP91CW28FG
PF1 I Not used (fixed at "L")
PF2 O Data latch signal input from TMP91CW28FG
PF3 O REQ signal output to TMP91CW28FG
PC0 I Clock signal input from TMP91CW28FG
VDIOCD2 — Power supply (+2.0 V)
PC1 O Serial data output to TMP91CW28FG
PC2 I Serial data input from TMP91CW28FG
PC3 I Data latch signal input from TMP91CW28FG
DVDD2 — Power supply (+1.5 V)
DVSS2 — Ground
PE0 — Not used (open)
PE1 — Not used (open)
PE2 — Not used (pull down)
x ao
PE3 — Not used (pull up)
y
VDIO2 — Power supply (+2.0 V)
i
O Not used (open)
O Not used (open)
I Not used (pull down)
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D-NE510/NE511/NE518CK
2 9 9 4 2 8
Pin Description
1 5 0 5 8 2 9 9 4
m
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9 9
2 8 9 9
11