Table of Contents
Advertisement
No.
Pin Name
1
IN T1
BO UT
2
3
T VDD
4
DV DD
5
DV SS
6
XT O
7
XT I
8
TE ST3
9
MCKO2
10
MCKO1
11
CO UT
12
U OUT
13
VO UT
14
SDTO 2
15
BICK 2
16
LR CK 2
17
SDTO 1
18
BICK 1
19
LR CK 1
20
CD TO
CC LK
21
SCL
CD TI
22
SDA
I/O
23
CSN
24
DA UX1
25
SDTI4
26
SDTI3
27
SDTI2
28
SDTI1
29
XT L1
30
XT L0
31
PDN
32
MA STER
DZF2
33
OV F
O
34
DZF1
35
LO UT 4
36
NC
3 7
RO UT 4
38
NC
39
LO UT 3
I/O
O
Interrupt 1 Pin
Bl oc k-Start Ou tput Pi n for Re ceiv er Input
O
ìH î durin g fi rst 40 flam es.
-
Output Bu ffer Po we r Supply Pin, 2.7V ~5.5V
-
Di gital Power Supply Pin, 4.5V ~5.5V
-
D igital Gr ound Pi n
O
X'tal cl oc k Ou tput Pin
I
X 'tal / Ex ternal cl ock Input Pi n
Test 3 Pi n
I
Th is pin should be connected to DV SS.
O
Master Cl ock Ou tput 2 Pi n
O
Master Cl ock Ou tput 1 Pi n
O
C-bit Ou tput Pi n for R ecei ver Input
O
U-bit Out put Pi n for Re ceiv er Input
O
V-bit Ou tput Pi n for R ecei ver Input
O
A udio Seri al Da ta Ou tput Pi n (D IR /D IT part)
I/O
A udio Seri al Da ta Cl ock Pin (D IR /D IT part)
I/O
C hannel Cl ock Pin (D IR /D IT part)
O
Au di o Seri al Da ta Ou tput Pi n (A DC /D AC part)
I/O
A udio Seri al Da ta Cl ock Pin (A DC /D AC part)
I/O
I nput Ch annel Cl ock Pin
O
C ontrol Da ta Ou tput Pi n in Seri al Mo de, I2C pin= "L".
I
C ontrol Da ta Clock Pin in Seri al Mo de, I2C pin=
I
C ontrol Da ta Clock Pin in Seri al Mo de, I2C pin=
I
C ontrol Da ta Input Pin in Serial Mo de, I2C pi n=
C ontrol Da ta Pi n in Se rial Mo de, I2C pi n=
I
C hi p Sel ect Pin in Seri al Mo de, I2C pin=
I
T hi s pi n should be co nnected to DV SS, I2C pin=
I
A UX Au di o Serial Da ta Input Pi n (ADC /DAC part)
I
DA C4 A udi o Serial Data Input Pi n
I
DA C3 A udi o Serial Data Input Pi n
I
DA C2 A udi o Serial Data Input Pi n
I
DA C1 A udi o Serial Data Input Pi n
I
Xí tal Fr equency Select 0 Pin
I
Xí tal Fr equency Select 1 Pin
Powe r-Do wn Mo de Pin
I
Wh en "L", the AK 4588 is powered-down , all output pin goes "L", all registers are
reset. Wh en C AD1 -0 pins are changed, the AK 4588 should be reset by PD N pin.
Ma ster Mo de Select Pi n
I
"H ": Ma ster mode, "L": Slav e mode
Zero Input Det ect 2 Pi n
Wh en the i nput data of the group 1 foll ow total 8192 LR CK cy cl es wi th "0" in put
O
data, this pin goes to "H". Wh en RS TN 1 bit is "0" or PW DA N bit is "0", this pin
goes to "H".
An alog Input Ov erfl ow De tect Pin
Th is pin go es to "H" if the analog in put of Lc h or Rc h ov erfl ow s. Th is pin beco mes
OV F pin if OV FE bit is set to 1.
Zero Input Det ect 1 Pi n
Wh en the in put data of the group 1 follo w total 8192 LR CK cy cl es wi th "0" in put
O
data, this pi n goes to "H". Wh en RS TN 1 bit is "0" or PW DAN bit is "0", this pin goes
to "H".
O
D AC 4 Lc h An alog Ou tput Pin
No Co nnect pin
-
No internal bonding . Th is pin should be opened.
O
DA C4 Rc h An alog Ou tput Pi n
No Co nnect pin
-
No internal bonding . Th is pin should be opened.
O
DA C3 Lc h An alog Ou tput Pin
Function
"L".
"H".
"L".
"H".
"L".
"H".
(Table 13)
(T able 13)
19
Hide quick links:
Advertisement
Table of Contents
