Advertisement
Internal Connections of the
n
Express5800/1000 Series
Increased inter-Cell data transfer speeds
Cell
Processor
Cell Controller
Processor
Processor
Processor
Memory
Memory
Mainframe-class RAS features
Reliability / Availability
•
Dual-Core Intel
®
Itanium
®
processor:
Error handling of hardware and operating system through Machine Check Architecture (MCA)
•
Memory mirroring:
Continuous operation even in the event of a non-correctable error
•
Partial Chipset degradation:
•
Highly Available Center Plane:
no longer requires a system shutdown
•
Complete modularization and redundancy:
continuous operation and serviceability
•
Clock modularization, redundancy and 16 processor domain segmentation:
Minimizes downtime, and avoids multi partition shutdown due to clock failure
•
Diagnostics of the error detection circuits:
•
Enhanced error detection of the high-speed interconnect:
Intricate error handling through multi bit error detection and retransmission of error data
•
Two independent power sources:
Serviceability
•
Autonomic reporting of logs with pinpoint prognosis of failed components allow for the realization of
mainframe-class platform serviceability
System Hardware Layout of the Express5800/1000
n
Series Server (1320Xf)
Service
Processor *
Clock card *
HDD Bay
Power
Distribution
Unit (PDU)
A
Chipset
3
Avoid multi-partition shutdowns resulting from chipset failures
System restoration after the replacement of a failed crossbar
Improvements in fault resilience,
Substantial strengthening of data integrity
Avoid system shutdown due to failures of the power distribution units
Fan box
Cell card
1
* Redundant
configuration
available
1
Fan box
PCI box
* Redundant
configuration
available
Power Bay
Service Processor
Fan box
Clock card
Cell card
HDD Bay
PCI box
Power Distribution Unit
Crossbar card
Power Bay
PCI slots
Crossbar
card
PCI slots
Hot Pluggable *
2
Fully
N+1
Redundant
Redundant
*1 Redundancy is optional
*2 Ability to replace a failed component
without shutting down other partitions
3
Advertisement
