Advertisement
Quick Links
NEC Enterprise Server
NEC Express5800/1000 Series
NEC Express5800/1000 Technology Guide Vol.1
Powered by the Dual-Core Intel
®
Itanium
®
Processor
NEC Express5800/1000 Series
Reliabilit y a nd Per for ma nce t h roug h
the f usion of t he N EC "A
3
" ch ipset a nd
®
®
the D u al- Core I ntel
It a n iu m
processor
1320Xf / 1160Xf
1080Rf
Advertisement
Related Manuals for NEC INTEL 5800/1000
Summary of Contents for NEC INTEL 5800/1000
- Page 1 NEC Enterprise Server NEC Express5800/1000 Series NEC Express5800/1000 Technology Guide Vol.1 Powered by the Dual-Core Intel ® Itanium ® Processor NEC Express5800/1000 Series Reliabilit y a nd Per for ma nce t h roug h the f usion of t he N EC “A ”...
- Page 2 Next generation enterprise IT platform NEC Enterprise Server Express5800/1000 series Leveraging NEC’s vector supercomputer and mainframe technology, Express5800 /1000 series is designed to meet the requirement of today’s mission critical enterprises. With the new Dual-Core Intel third generation chipset “A compromised to realize mainframe-class reliability and supercomputer-class per formance.
- Page 3 Internal Connections of the Express5800/1000 Series Increased inter-Cell data transfer speeds Cell Processor Cell Controller Processor Processor Chipset Processor Memory Memory Mainframe-class RAS features Reliability / Availability • Dual-Core Intel ® Itanium ® processor: Error handling of hardware and operating system through Machine Check Architecture (MCA) •...
- Page 4 Itanium processor, redesigned for even faster processing of larger data sets. The system has been equipped with the NEC designed chipset, “A ”, in order to improve performance by utilizing, to its full extent, the massive 24MB of cache memory that has been built into the Dual-Core Intel ®...
- Page 5 VLC Architecture High-speed / low latency Intra-Cell cache-to-cache data transfer The Express5800/1000 series server implements the VLC architecture, which allows for low latency cache-to-cache data transfer between multiple CPUs within a cell. In a split BUS architecture, for a cache- to-cache data transfer to take place, the data must be passed through a chipset.
- Page 6 Mainframe-class RAS Features RAS Design Philosophy Realization of a mainframe-class continuous operation through the pursuit of reliability and availability in a single server construct Generally, in order to achieve reliability and availability on an open server, clustering would be implemented. However, clustering comes with a price tag.
-
Page 7: Memory Mirroring
Memory Mirroring Continuous operation even in the event of a non-correctable memory error The Express5800/1000 series server supports high-level memory RAS features to ensure that the server can rapidly detect memory errors, reduce multi-bit errors and continually operate even in the event of memory chip or memory controller failures. - Page 8 Mainframe-class RAS Features Highly Available Center Plane System restoration after the replacement of a failed crossbar card no longer requires a planned system downtime The Express5800/1000 series server has separated and modularized the crossbar controller which ordinarily would reside on the system center plane. By moving the crossbar controller off of the center plane, a reduction in center plane failures has been realized.
- Page 9 Modularization, redundancy and domain segmentation of the system clock Minimizes downtime, and avoids multi-partition shutdown due to clock failure Through modularization and redundancy, system downtime, due to clock failures, have been minimized. The Express5800/1000 series server has taken it one step further. In many cases, when a system is said to have a redundant clock, in actuality, only the oscillator is redundant.
- Page 10 Mainframe-class RAS Features Enhanced error detection of the high-speed interconnect Intricate error handling through multi-bit error detection and resending of errored data Since higher speed interconnects are implemented to increase system performance, there are higher probabilities that interference noise will cause errors occurring along these interconnects.
-
Page 11: Investment Protection
Flexibility and Operability Pursuit of flexibility and operability in a system — Flexible resource virtualization using floating I/O for improved operability Investment Protection Smooth migration to future processors The Express5800/1000 series servers now support the Dual-Core Intel ® Itanium ® processors with two complete 64-bit cores on each processor. - Page 12 Supported OS * NEC is a registered trademark and Empowered by Innovation a trademark of NEC Corporation and/or one or more of its subsidiaries. All are used under license. * Intel, Intel logo, Itanium and Itanium inside are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the United States and other countries. * Microsoft and Windows are registered trademarks or trademarks of the US Microsoft Corporation in the United States and other countries.