Sony PRS-500 Service Manual page 47

MAIN BOARD IC201 R5C807 (SD I/F CONTROLLER)
Pin No. Pin Name
1 VCCEN
2 GPIO
3 LED
4 HWSPND
5 RWMODE
6 WAMODE
7 LTLEN
8 TEST
9 CKIN
10 GND
11 RST
12 VCC_ROUT
13 VCC_RIN
14 REGEN
15 INT
16 WAIT/DTACK
17 WR
18 RD
19 EB1
20 EB2
21 VCC_HOST
22 CS
23 D15
24 D14
25 D13
26 D12
27 D11
28 D10
29 D9
30 D8
31 D7
32 D6
33 D5
34 GND
35 D4
36 D3
37 D2
38 D1
39 D0
40 BS
41 A22
42 VCC_ROUT
43 A21
44 A20
45 A19
46 A18
47 A17
48 VCC_HOST
I/O
O Not used (Open)
I/O Not used (Open)
O Not used (Open)
I Hardware suspend input
I Read-write timing mode select (Not used (Fixed to "H"))
I WAIT/DTACK mode select (pull-up: WAIT, pull-down: DTACK)
I Little endian mode select (Not used (Fixed to "L"))
I Test mode (Not used (Fixed to "L"))
I Clock input
— Ground
I Reset input
— 1.8V DC input
— 3.1V DC input
I Regulator enable (Not used (Fixed to "L"))
O Interrupt request output
O Wait and Data acknowledge output (refer to pin6)(Not used (Open))
I Write enable input
I Read enable input
I Enable byte (fixed low)
I Enable byte (fixed low)
— 3.1V DC input
I Chip select input
I/O 16 bits data bus
I/O 16 bits data bus
I/O 16 bits data bus
I/O 16 bits data bus
I/O 16 bits data bus
I/O 16 bits data bus
I/O 16 bits data bus
I/O 16 bits data bus
I/O 16 bits data bus
I/O 16 bits data bus
I/O 16 bits data bus
— Ground
I 16 bits data bus
I 16 bits data bus
I 16 bits data bus
I 16 bits data bus
I 16 bits data bus
I Bus cycle start (Not used (Fixed to "L"))
I 23 bits address bus (Not used (Fixed to "L"))
— 1.8V DC input
I 23 bits address bus (Not used (Fixed to "L"))
I 23 bits address bus (Not used (Fixed to "L"))
I 23 bits address bus (Not used (Fixed to "L"))
I 23 bits address bus (Not used (Fixed to "L"))
I 23 bits address bus (Not used (Fixed to "L"))
— 3.1V DC input
Description
PRS-500
47