Sony PRS-500 Service Manual page 44

PRS-500
MAIN BOARD IC601 CXD3452GA (MS I/F CONTROLLER)
Pin No. Pin Name
1 VDD0
2 MODE0
3 MODE1
4 TRST
5 XRS
6 XINT
7 VSS0
8 XDRQ0
9 XDRQ1
10 AB2
11 AB3
12 AB4
13 VDD1
14 AB5
15 AB6
16 AB7
17 AB8
18 XDAK0
19 XDAK1
20 VSS1
21 XCS
22 XRD
23 XWR
24 HCKI
25 VDD2
26 XMSCKI
27 DB0
28 DB1
29 DB2
30 VSS2
31 DB3
32 DB4
33 DB5
34 DB6
35 VDD3
36 DB7
37 DB8
38 DB9
39 DB10
40 VSS3
41 DB11
42 DB12
43 DB13
44 DB14
45 VDD4
46 DB15
47 DB16
48 DB17
44
I/O
— 2.9V DC input
I Mode select (Not used (Fixed to "L"))
I Mode select (Not used (Fixed to "L"))
I Not used (Fixed to "L")
I Reset input
O Interrupt request
— Ground
O DMA request (Not used (Open))
O DMA request (Not used (Open))
I Address bus
I Address bus
I Address bus
— 2.9V DC input
I Address bus
I Address bus
I Address bus
I Address bus
I DMA acknowledge input (Not used (Fixed to "L"))
I DMA acknowledge input (Not used (Fixed to "L"))
— Ground
I Chip select input
I Read enable input
I Write enable input
I System clock input
— 2.9V DC input
I MS communication clock input
I/O 32 bits data bus
I/O 32 bits data bus
I/O 32 bits data bus
— Ground
I/O 32 bits data bus
I/O 32 bits data bus
I/O 32 bits data bus
I/O 32 bits data bus
— 2.9V DC input
I/O 32 bits data bus
I/O 32 bits data bus
I/O 32 bits data bus
I/O 32 bits data bus
— Ground
I/O 32 bits data bus
I/O 32 bits data bus
I/O 32 bits data bus
I/O 32 bits data bus
— 2.9V DC input
I/O 32 bits data bus
I/O 32 bits data bus
I/O 32 bits data bus
Description