Power Box; Audio Board: Circuit Diagram (Part 1 To Part 4) - Philips HTS6600 Service Manual

Circuit Diagram and PWB Layout

Power Box

Audio Board: Circuit Diagram (Part 1)
1 2 3
7100
74LVC1G125GW
A 3101
2
SPDIF_IN1
100R
1
EN
B
+3V3
+3V3_SPDIF
C
47R 3180
2112 100n 3112 33R
SPDIF_IN0
2113 100n 3113 33R
3115 33R
SPDIF_OPT
D 100R
+3V3_SPDIF
2119 100n
3119
3131 33R
7103
74LVC1G32GW
1
DSP_CLK
4
2
SDA_PA
SCL_PA
3138
+3V3_SPDIF
E 10K
3143 100R
RST_AK4113
3146
+3V3_SPDIF
10K
F
G
H
I
1 2 3
3139 785 32530
4 5 6
+3V3_SPDIF
600R
5100
4
3105
3106
100R
2105
10p
5101 5102
7104
AK4113VF
Φ
11
RX1 DIR
12 4
RX2|DIF0 V|TX
13
RX3|DIF1
14 20
INT_AK4113
RX4|DIF2 INT0
15
RX5
16 17
IPS|RX6 INT1
5
XTI
6
XTO
26
MCKO1 SPDIF_MCLK
29
CM1|CDTI|SDA
25
MCKO2
28 100R 3179
OCKS1|CCLK|SCL
22 3137 100R
SDTO I2S_SPDIF_DATA
27
OCKS0|CSN|CAD0
30 3141 10K
CM0|CDTO|CAD1 +3V3_SPDIF
7
PDN
21 33R 3145
LRCK I2S_IN_LRCK
19
FS96|I2C
23
BICK I2S_IN_SCLK
18 33R 3147
P|SN
8 24
R DAUX
I2S_ADC_DATA
33R 3148
I2S_SPDIF_DATA
4 5 6
7 EN 65
7 8 9
+3V3
2120 100n
7101
74LVC1G32GW
1
5109
SPDIF_MCLK 3103
4
I2S_MCLK
2
47R
120R
5103
+3V3
30R
7108
1
DSO751SV
3153
100R
3
24M576
2115
+3V3
470n +3V3
7107 B4B-PH-K
3139
BC847BW
RST_DSP +3V3
100K
7106
BC847BW
2140
+3V3
100n
7109
TPA5050
Φ
VDD
3163 10K 10 15 33R 3160
+3V3 0 DATA_OUT1
3164 10K 11
1 ADD
3161 10K 12 5
2 +3V3
16 6
I2S_IN_SCLK
BCLK1
1 7
I2S_IN_LRCK
LRCLK1
2 GND 8
DATA1
3 9
SCL_PA SCL
4 14
SDA_PA SDA
GND
GND
(VIA)
(HS)
7 8 9
10 11 12 13
7102
LD1117
F110
3 2
IN OUT
ADJ
3155
+3V3
+1V25
5104 5105
5106
5108
7105
DSPC56371AF180 A P D
IO_VDD CORE_VDD
PLL_VDD
34 3107 10K
Φ
MOSI
45
EXTAL HA0
37 3108 10K
DSP
SS
3109 4K7 46
NMI_PINIT HA2
CLOCK 35 3110 100R
MISO
69
ADO SDA
70 36 3111 100R
ACI SCK
SCL
PD<1:0> 38 3114 100R
SHI HREQ
SPDIF
3116 10K 51 PC<0:11>
A
3117 10K 50 76 3118 33R
B SCKR
3120 10K 49 MOD 78 3121 33R
C FSR
3122 10K 48 72
D HCKR
77 3124 33R
SCKT
IRQ<A:D> 79 3125 33R
FST
47 73
RESET HCKT
1101 INTERRUPTS 80
SDO5
31 1 3130 33R
1 TDI SDO4
32 4
2 TCLK SDO3
30 5 3133 33R
3 TDO SDO2
33 6 3135 33R
4 TMS SDO1
7 3136 33R
JTAG SDO0
3140 10K 26 SDI<0:3>
0 ESAI
3142 10K 27 TIO
1
PE<0:11>
TIMER
63
SCKR
19 61
0 FSR
18 67
1 HCKR
13 62
2 SCKT
14 60
3 FST
15 66
4 HCKT
16 59
5 PF SDO5
10 58
6 SDO4
11 57
7 SDO3
9 56
8 SDO2
21 55
9 SDO1
23 54
10 SDO0
GPIO
3151
22 SDI<0:3>
SCAN
SCAN ESAI_1
10K
PLL_GND
IO_GND CORE_GND
A P D
2139
+3V3
100n
7111
TPA5050
Φ
VDD
3185
3176 10K 10 15
I2S_D_DATA
0 DATA_OUT1
3177 10K 11
100R
1 ADD
3178 10K 12 5
2
16 6
BCLK1
1 7
LRCLK1
2 GND 8
DATA1
3 9
SCL_PA SCL
4 14
SDA_PA SDA
GND
GND
(VIA)
(HS)
I2S_D_LRCK
4104
I2S_D_SCLK
4105
3139-243-36064-130-01-a2 pbx.pdf
10 11 12 13
14 1101 D10 5104 B11
2100 A4 5105 B12
2105 B4 5106 B11
2106 A11 5107 B10
2107 C4 5108 B12
2108 C4 5109 A9
2109 C4 7100 A3
2110 C4 7101 A8
2111 C4 7102 A11
2112 D2 7103 D1
2113 D2 7104 C4
A
2115 D9 7105 C11
2116 D10 7106 E8
2117 E9 7107 E9
2118 E8 7108 C9
2119 D2 7109 H8
2120 A8 7111 H11
2121 B11 F110 A12
2122 B11
2123 B12
2124 B12
2125 B11
B 2126 B11
2127 B11
2128 B11
2129 B11
2130 B11
2131 A12
2132 B12
2133 B12
2134 B12
2135 B12
2136 C8
2137 C9
C
2138 B11
2139 G11
SDA_DSP
2140 G8
2143 B12
SCL_DSP
2144 E2
2145 B9
INT_DSP
2146 C3
2147 C3
I2S_D_SCLK 2148 E8
I2S_D_LRCK
2149 E2
3100 A8
I2S_DSP_SCLK
I2S_DSP_LRCK 3101 A3
D
I2S_MCLK 3103 A8
3105 B4
I2S_D_DATA 3106 B4
3107 C12
I2S_DSP_CSW
3108 C12
I2S_DSP_SLR
I2S_DSP_FLR 3109 C10
3110 C12
3111 C12
3112 D3
3113 D3
3114 C12
E
3115 D3
3116 D10
3117 D10
3118 D12
3119 D1
3120 D10
3121 D12
3122 D10
3123 D8
3124 D12
3125 D12
3128 D8
F
3129 D9
3130 D12
3131 D2
3133 D12
3134 D9
3135 D12
3136 D12
3137 E5
3138 E3
3139 E8
3140 E10
3141 E5
G
3142 E10
3143 E2
3144 E9
3145 E5
3146 E3
3147 E5
3148 E5
3149 F3
3150 F4
3151 F10
3152 B8
H 3153 C9
3154 A11
3155 A12
3160 H9
3161 H7
3163 H7
3164 H7
3176 H10
3177 H10
3178 H10
3179 E5
3180 D2
I
3181 C2
3185 H12
4100 A2
4104 I11
4105 I11
5100 A4
5101 C4
5102 C5
2007-01-26
5103 B8
14