Integra DHC-9.9 Service Manual page 77

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IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS -33
U8031: S29GL128N (128 Mbit Flash Memory)
TERMINAL DESCRIPTION
PIN
A0 A22
DQ0 DQ14
DQ15 / A-1
BYTE#
CE#
OE#
WE#
RESET#
WP# / ACC
RY / BY#
V
CC
V
IO
V
SS
NC
TE
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DESCRIPTION
Adress Input(23 pins)
Data Input/Output(15 pins)
DQ15(Data Input/Output: Word Mode), A-1(LSB Adress Input: Bite Mode)
Selector of 8 bit Mode and 16 bit Mode
Chip Enable
Output Enable
Write Enable
Hardware Reset Pin
Hardware Write Protect Input/Acceleration Input
Ready / Busy Output
3.0V Power Supply
Output Buffer Power Supply
GND
No Connection
LOGIC SYMBOL
23
A0 ~ A22
CE#
OE#
WE#
WP#/ACC
RESET#
V
IO
BYTE#
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2 9
8
Q Q
3 6 7 1 3 1 5
16 or 8
DQ0 ~ DQ15
(A-1)
RY/BY#
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TX-SR876/SA876
9 4 2 8
0 5 8 2 9 9 4 2 8
m
9 9
9 9