SECTION 2
Z80 PROCESSOR
2.1 SCOPE
This
section
discusses
and summarizes the Z80 instruction set that is
used
in
programming the
MSC
8009.
The
instructions
are
grouped
according to
the
type of instruction.
Each instruction is described
using the assembly language mnemonic operation
code;
the
instruction
name;
the symbolic
operation;
a description;
the binary fields and
pattern that make up the machine instruction; and the number of memory
cycles, machine states and affected flags.
The mnemonic operation codes used here differ in some cases from those
used by Zilog so as to be compatible with
commonly used
8080
(Intel)
mnemonics.
The
equivalent
Zilog operation codes appear to the upper
right of each instruction description.
2.2 INSTRUCTION AND DATA FORMAT
The program instruction may be 1, 2, 3 or 4 bytes (8 bits
=
1 byte)
in
length.
A multiple-byte
instruction
is
stored in successive memory
locations with the first byte address as the instruction
address.
The
exact format depends on the operation that is to be performed.
As with
instructions,
multi-byte data are stored in successive memory
locations with the least-significant byte first.
2.3 ADDRESS MODES
There are four modes of addressing data that are stored either in me:nory
or in processor registers.
1)
DIRECT Mode uses byte 2 and byte 3 of the instruction to define
the
desired memory location of the data.
Byte 2 contains the low-order
bits of the address and byte 3, the high-order bits.
2)
REGISTER Mode uses a 2 or 3 bit field in the instruction to specify
the register or register pair containing the data.
3)
REGISTER INDIRECT Mode uses
a
2 or 3 bit field in the instruction to
define
a register pair that contains the memory address of the data
location.
The first register
holds
the high-order
bits
of the
address and the second, the low-order bits.
100-0123-001
2-1
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