Block Diagram - Video Process Section - Sony STR-DA5400ES Service Manual

STR-DA5400ES
6-6.

BLOCK DIAGRAM - VIDEO PROCESS Section -

Q[2] - Q[11],
Q[14] - Q[23],
30
Q[26] - Q[35]
32
D-VIDEO BUS
(Page 30)
RX_ODCK[3]
RX_HSYNC
RX_VSYNC
RX_DE
D[2] - D[11],
D[14] - D[23],
30
D[26] - D[35]
CLOCK GENERATOR
IC3863
FLI_ODCK[1]
3 CLK1
FLI_ODCK[2]
2 CLK2
ODCK
5 CLK3 REF 1
HSYNC
VSYNC
SD-RAM
DE
IC3618
DATA BUS
DQ0 – DQ15 FSDATA [16] – FSDATA [31]
ADDRESS BUS
A0 – A12 FSADD [0] – FSADD [12]
45
CLK
/CLK 46
CKE 44
26
BA0
BA1 27
24
CS
23
RAS
CAS 22
21
WE
LDM 20
UDM 47
16
LDQS
UDQS 51
SD-RAM
IC3602
DATA BUS
DQ0 – DQ15
FSDATA [0] – FSDATA [15]
ADDRESS BUS
A0 – A12 FSADD [0] – FSADD [12]
CLKP
CLK
45
CLKN
/CLK 46
CKE
CKE 44
FSBKSEL0
BA0
26
FSBKSEL1
BA1 27
FSCS0
CS 24
RAS
RAS
23
CAS
CAS 22
WE
WE
21
LDM 20
UDM 47
LDQS
16
UDQS 51
STR-DA5400ES
VIDEO PROCESSOR1
IC3601
A3P AF4 CVBS
EXT_IN
B3P AE5
38
C1P AC1 CY
(Page 36)
B1P AC2 CB
A1P AB1 CR
C3P AF5 2ND_CVBS
P4 IPCLK1
Y1 AHS
Y2 AVS
65
Y3 AHREF_DE
(Page 31)
FLI_CLK
X3602
TCLK C26
19.6608MHz
MSTR0_SDA AA23 5 SDA
EEPROM
MSTR0_SCL AA24 6 SCL IC3621
P24 DCLK
SV1P AB2
SV2P AE1
SV3P AE4
P25 DHS
R26 DVS
AIP_RAW_HS_CS AF12
P26 DEN
AIP_RAW_VS AE12
FSDATA16 –
FSDATA31
FSADDR0 –
FSADDR12
D5 FSCLKP
C5 FSCLKN
C4 FSCKE
C21 FSBKSEL0
C20 FSBKSEL1
D21 FSCS0
C24 FSRAS
D24 FSCAS
C23 FSWE
B22 FSDQM3
B17 FSDQM2
A22 FSDQS3 FLASH MEMORY
IC3615
A17 FSDQS2
OCMDATA0 –
F_D [0] – F_D [15] DQ0 – DQ15
OCMDATA15
OCMADDR1 –
F_A [1] – F_A [21] A0 – A20
OCMADDR21
ROM_CS_N AD24 26 CE
OCN_RE_N AC25 28 OE
OCN_WE_N AC26 11 WE
FSDATA0 –
FSDATA15 12 RESET
40
X1
X3601
4MHz
39 X0
A11 FSDQM1
RESET AD9 126 Faroudja UCOM RESET
A6 FSDQM0
B11 FSDQS1 MSTR1_SCL A3 Faroudja UCOM BUSY
142
B6 FSDQS0
MSTR1_SDA A2 125 Faroudja Power DETECT
OCM_UDI_1 B3 141 Faroudja UCOM UART TX
OCM_UDO_1 B2 140 Faroudja UCOM UART RX
LBADC_IN1 AF10 110 MAIN_FARO_WAKE
OSD CONTROLLER
IC3604
FLASH MEMORY
103 R
IC3603
104 G
DATA BUS
105
B
MD0 – MD15 Y_D [0] – Y_D [15] DQ0 – DQ15
ADDRESS BUS HDMI SYS +3.3V
137 HSYNC_N
MA1 – MA24 Y_A [0] – Y_A [23] A0 – A23
136 VSYNC_N
MOE_N 74 34 OE REFERENCE
VOLTAGE
WE
MWE_N 73 13
REGULATOR
14 RESET
Q001, 002
PS0 – PS2
D0 – D7
23 25 39 28 29 30 33 – 31
15 – 22
YAMAHA_D [0] – YAMAHA_A [0] –
YAMAHA_D [7] YAMAHA_A [2]
BUFFER BUFFER
IC3620 IC3619
DIR XOE XOE
1 19 19
22 119 21 46 – 56, 59 – 63 18 64 – 72, 75 – 83
VIDEO SYSTEM CONTROLLER
32 32
D/A CONVERTER
IC3850
D[16] - D[23],
16
D[28] - D[35]
Y0 – Y7,
C0 – C7
HSYNC
23 P_HSYNC
50 S_HSYNC
VSYNC
24 P_VSYNC
49 S_VSYNC
DE
25 P_BLANK
48 S_BLANK
FREQUENCY
MULTIPLIER
IC3854
ODCK
2 IN OUT2 8
32 CLKIN_A
FSO
4
33 21 22
106
141
XIN
X3603
33.2MHz
XOUT 142
S-RAM
IC3611
WE UB LB OE CE
17 40 39 41 6
3 8 11
AND
GATE
IC3609
1 2 10 9 12 13
26 27 25 19 3 32
NON_LPCM
Flash Update RX 134
Flash Update TX 135
MAIN UCOM SDA
MAIN UCOM SCL
MAIN UCOM UART BUSY
ENDFLAG
IC3610 (3/3)
V 44 CVBS OUT1
Y/G 39 CY OUT1
41
CB/R 38 CB OUT1
(Page
CR/B 37 CR OUT1 36)
UC3V_SDA,
UC3V_SCL
33
(Page 30)
• SIGNAL PATH
: VIDEO
(Page
27)
51
92 NON_LPCM
RX232C
30
TX232C
(Page
29)
4 VIDEO_UCOM_SDA
5 VIDEO_UCOM_SCL
VUCOM_BUSY
139
26
STOP IN 2 STOP
136 VUCOM_FLG
(Page
INITX 131 VUCOM_RST
37)
MD2 128 VUCOM_MD