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STR-DA5400ES
6-2.

BLOCK DIAGRAM - DSP Section -

SI_A
SI_B
SI_C
SI_D
SI_E
BCK
LRCK
9
(Page 27)
DIR-ERR
MCK
DIR_NONAU
D232C_RX
102
SI3
(Page 29)
18
D232C_TX
103
SO3
DUCOM SDA
41
SDA
DUCOM SCL
42
SCL
MD_BUSY
63
MD_BUSY
MD_INT
82
MD_INT
19
(Page 29)
DM_BUSY
64
DM_BUSY
MD2
52
MD2
DRST_TRG
36
DRST_TRG
DUCOM_RESET
55
XRESET
STR-DA5400ES
DSP1
IC5002
P14
DPSIA
DPSOA
P10
M13
DPSIB
DPSOB
P11
P12
M14
DPSIC
DPSOC
L14
DPSID
DPSOD
P13
K14
DPSIE
DPSOE
N14
G14
DPBCK
DPDVBCK
H14
DPLRCK
J14
H13
DPDVLRCK
DAI_P4 N10
D5001
P_ERROR
E14
F1
FLAG1
AD0 – AD7
F14
DPFSCK
F13
NONAUDIO
ALE
N2
AD8 – AD15
WR
M2
RD
N3
B4
CLKIN
X5001
DSP1_MISO
12.288MHz
MISO A10
A2
XTAL
DSP1_MOSI
MOSI A9
DSP1_SPICLK
SPICLK B9
DSP1_BOOTCFG0
BOOTCFG0 C2
DSP1_BOOTCFG1
BOOTCFG1 C1
DSP1_SPIDS
SPIDS A11
FLAG0 F2
DSP1_RESET
RESET B10
1
93 92
94 11 83 12 13 14
DATA SELECTOR
IC5013
11 3A
3Y 9
10 3B
2 1A
1Y 4
3 1B
5 2A
2Y 7
6 2B
SELECT 1
FLASH MEMORY
IC5006
DQ0 – DQ7
ADDRESS LATCH
IC5009
D0 – D7
O0 – O7
11
LE
DQ15/A-1,
A0 – A18,
ADDRESS LATCH
NC (A19)
IC5010
D0 – D6
O0 – O4
11
LE
O6 13
26
CE#
11
WE#
28
OE#
12
RESET#
S-RAM
IC5007
I/O0 – I/O7
X5201
25MHz
A0 – A18
IC5012
8
CE
37
OE
15
WE
DSP1_INT
17 20 100 99 101 21 84
22
25 26
9
10
28
28
DSP2
IC5202
M13
DPSIB
DPSOA
P10
DPSIC
DPSOB
P11
M14
P12
L14
DPSID
DPSOC
K14
DPSIE
DPSOD
P13
P14
DPSIA
G14
DPBCK
DPDVBCK
H14
H13
DPLRCK
J14
DPDVLRCK
N10
DAI_P4
F1
FLAG1
F14
DPFSCK
AD0 – AD7
F13
P_ERROR
ADDRESS LATCH
IC5209
D0 – D7
O0 – O7
N2
11
LE
ALE
DAI_P1
P7
ADDRESS LATCH
IC5210
AD8 – AD15
D0 – D7
O0 – O7
11
LE
N3
RD
M2
WR
SPICLK
B9
MOSI
A9
E14
SF2_DSP2_CE
SF2_CPU_CE
SF2_DSP2_MAS
B4
CLKIN
SF2_DSP2_MAS P9
A2
XTAL
DSP2_SPICLK
DSP2_BOOTCFG0
DSP2_MOSI
C2
BOOTCFG0
DSP2_MISO
DSP2_BOOTCFG1
BOOTCFG1
C1
MISO A10
DSP2_SPIDS
SPIDS A11
DSP2_INT
FLAG0 F2
DSP2_RESET
RESET B10
DSP CONTROLLER
X5202
IC5208
12.5MHz
XOUT 57
XIN 58
SDO1
SDO2
SDO3
SDO4
20
(Page 29)
BCK
LRCK
S-RAM
IC5207
I/O0 – I/O7
A0 – A16
DSP1_A16
I/O8 – I/O15
41
OE
17
WE
SERIAL FLASH
IC5213
FLIP-FLOP
1
CE#
IC5212
BUFFER
6
SCK
IC5211
5
SI
2
SO
SIGNAL PATH
: AUDIO (DIGITAL)

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