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HT-CN410DVH
IC201, Programmable Multimedia and DSP Processor (ES6809PADF)
Table 1 ES6809 Pin Description (Continued):
Names
VDAC
YUV6
PIXOUT6
VD33_DA
VS33_DA
YDAC
YUV5
PIXOUT5
CDAC
YUV2
PIXOUT2
UDAC
YUV0
PIXOUT0
ADC_BIAS
MIC
ADC_CAP
TWS
AOUT_O1L
TSD0
AOUT_O2L
TSD1
AOUT_O2R
Pin Numbers
110
111
112
113
114
115
116
117
118
119
120
121
I/O
O
VideoDAC output. Refer to description and matrix for UDAC pin 115.
O
YUV pixel 6 ouput data.
O
CCIR656 output pixel 6.
P
Poer for I/O power supply for VDAC.
G
Ground for I/O power supply for VDAC.
O
VideoDAC output. Refer to description and matrix for UDAC pin 115.
O
YUV pixel 5 ouput data.
O
CCIR656 output pixel 5.
O
VideoDAC output. Refer to description and matrix for UDAC pin 115.
O
YUV pixel 2 ouput data.
O
CCIR656 output pixel 2.
O
Video DAC ouput
PIN
109
Value
F DAC
0
CVBS/Chroma
1
CVBS/Chroma
2
CVBS/Chroma
3
CVBS/Chroma
4
CVBS/Chroma
5
CVBS/Chroma
6
CVBS/Chroma
7
N/A
8
CVBS/Chroma
9
CVBS
10
CVBS
11
N/A
12
CVBS/Chroma
13
CVBS/Chroma
14
Chroma
F : CVBS/Chroma signal for simultaneous mode.
Y : Luma component for YUV and Y/C processing.
C : Chrominance signal for Y/C processing.
U : Chrominance component signal for YUV mode.
V : Chrominance component signal for YUV mode.
YUV pixel 0 output data.
O
CCIR665 ouput pixel 0.
O
Audio ADC bias voltage out.
O
Audio ADC MIC 1.
I
Audio ADC output capacitance.
O
Audio transmit frame sync output.
O
Audio left channel 1 out.
O
Audio transmit serial data port 0.
O
Audio left channel 2 out.
O
Audio transmit serial data port 1.
O
Audio right channel 2 out.
O
50
Definitions
110
113
114
V DAC
Y DAC C DAC
CVBS1
Y
C
CVBS1
Y
C
N/A
Y
C
CVBS1
N/A
N/A
CVBS1
N/A
N/A
CVBS1
Y
Pb
N/A
Y
Pb
SYNC
G
B
Chroma
Y
Pb
CVBS1
G
B
CVBS1
G
R
SYNC
G
R
N/A
Y
Pr
CVBS1
Y
Pr
Y
G
R
115
U DAC
N/A
CVBS2
N/A
CVBS2
N/A
Pr
Pr
R
Pr
R
B
B
Pb
Pb
B
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