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HCD-GN700/GX8800
QQ
3 7 63 1515 0
Pin No.
Pin Name
54
BOOT/IO6
55
TXO/IO7
56
VSSP
57
PDO
58
VCOI
59
VDDP
60
CKO
61
VDDX
62
XI
63
XO
64
VSSX
TE
L 13942296513
www
.
50
http://www.xiaoyu163.com
I/O
I
Terminal for test/SUBQ interface frame sync input (fixed at "L")
I
Flag signal input 2/SUBQ interface block sync input (fixed at "L")
–
Ground for VCO circuit
O
PLL phase error detection signal output
I
VCO control voltage input
–
Power supply (2.5V) for VCO circuit
O
External clock output
–
Power supply (2.5V) for oscillation circuit
I
Resonator terminal (input)
O
Resonator terminal (output)
–
Ground for oscillation circuit
x
ao
y
i
http://www.xiaoyu163.com
8
Description
Q Q
3
6 7
1 3
u163
.
2 9
9 4
2 8
1 5
0 5
8
2 9
9 4
m
co
9 9
2 8
9 9
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