Sony TA-E9000ES Service Manual page 63

• IC2015 CXD8751Q (DIGITAL Board)
Pin No.
Pin Name
1 LAC3
2 NC
3 WSR
4 GPIO0
5 NC
6 VDD
7 NC
8 SCKR
9 SDI0
10 DI3
11 DI2
12 DI1
13 BCKI
14 LRCK
15 DCK
16 MCK
17 GND
18 BCK0
19 LRCKO
20 RLRCK
21 LRPH
22 MCPH
23 NC
24 HALM
25 DO1
26 SRD
27 NC
28 VDD
29 NC
30 DO3
31 DO4
32 HDO4
33 HDI1
34 H2X1
35 HIIS
36 STD
37 TRFS
38 TCLK
39 GND
40 DTI
41 RFSO
42 RCLKO
43 DRO
44 NC
I/O
I Not used (Fixed at "L" or "H")
— Not used
O Not used
O Not used
— Not used
— Power supply (+5V)
— Not used
O Not used
O Not used
I DATA input (HDO4 = "L" at DO4 output)
I DSP to data input 2 HDI1 "L" at RXD in output
I DSP to data input 1 HDI1 "H" at RXD in output
I DSP to data input bit clock input TXD in output
I DSP to data input LRCK clock input
I 256Fs master clock assistance input Fixed at "L" or "H"
I 256Fs master clock input
— Ground
O Audio data output bit clock output ("H" n "L"standard)
O Audio data output synchronous LRCK output ("H" : Lch)
O Audio data input synchronous LRCK output ("H" : Lch)
I LRCK clock input phase control input ("L" : SONY standard, "H" : IIS)
I 256Fs master clock phase control input
— Not used
I Corresponding DSP switch mode input
O First (2ch) audio data output
O Second (2ch) audio data output
O Not used
— Power supply (+3.3V or +5V)
— Not used
O Third (2ch) audio data output
O Fourth (2ch) audio data output
I DO4 output switch mode ("H" : DO4, "L" : DI3 output)
I DSP data input switch ("H" : DI1, "L" : DI2 RXD to output)
I System input/output data Fs ratio switch ("H" : 2 : 1, "L" : 1 : 1)
I Input LRCK timing setting ("L" : SONY standard, "H" : corresponds to IIS)
I Not used (Fixed at "L" or "H")
O Frame synchronous pulse output for reading DSP data
O Clock (256Fs) output for reading DSP data
— Ground
I DSP reading data input
O Frame synchronous pulse output for writing DSP data
O Clock (64Fs) output for writing DSP data
O DSP writing data output
— Not used
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Function