Table 13.
I/O Map (continued)
Address (hex)
Size
03B0 - 03BB
12 bytes
03C0 - 03DF
32 byte
03E8 - 03EF
8 bytes
03F6
1 byte
03F8 - 03FF
8 bytes
04D0 - 04D1
2 bytes
2
0CF8 - 0CFB
4 bytes
3
0CF9
1 byte
0CFC - 0CFF
4 bytes
FFA0 - FFA7
8 bytes
FFA8 - FFAF
8 bytes
96 contiguous bytes starting on a
128-byte divisible boundary
64 contiguous bytes starting on a
64-byte divisible boundary
256 contiguous bytes starting on
a 256-byte divisible boundary
64 contiguous bytes starting on a
64-byte divisible boundary
32 contiguous bytes starting on a
32-byte divisible boundary
16 contiguous bytes starting on a
16-byte divisible boundary
4096 contiguous bytes starting on
a 4096-byte divisible boundary
32 contiguous bytes starting on a
32-byte divisible boundary
96 contiguous bytes starting on a
128-byte divisible boundary
Notes:
1.
Default, but can be changed to another address range
2.
Dword access only
3.
Byte access only
NOTE
Some additional I/O addresses are not available due to ICH addresses aliasing. For information
about ICH addressing, refer to the Intel web site at:
http://developer.intel.com/design/chipsets/datashts/
Description
Intel 82810E – DC100 Graphics/Memory Controller Hub (GMCH)
Intel 82810E – Graphics/Memory Controller Hub (GMCH)
COM3
Primary IDE channel command port
COM1
Edge/level triggered PIC
PCI configuration address register
Turbo and reset control register
PCI configuration data register
Primary bus master IDE registers
Secondary bus master IDE registers
ICH (ACPI + TCO)
Desktop Board Resource
ICH Audio Mixer
ICH Audio Bus Mixer
ICH (USB)
ICH (SMBus)
Intel 82801AA PCI Bridge
Intel 82559 LAN Controller
LPC47B277 PME Status
Technical Reference
41