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IC BLOCK DIAGRAM & DESCRIPTION
IC BLOCK DIAGRAM
& DESCRIPTION
1C104
CXD2518Q
( DIGITAL
SIGNAL
PROCESSOR
)
IC104
CXD2518Q
( DIGITAL
SIGNAL
PROCESSOR
)
\
No.
I Name 11/01
Description
1
%E$===a
Turns "H" when sync SO or S1 IS detec!ed.
0
Serial
OMD.I
of SUBO & SOBIT.
I 41 I WOCK I
O
I Not used
I
DIA mteriace
for 48-b,l
slot.
42
LRCK
o
LR clock (f= FS)
43
LRCKI
I
Inputs LR clock to DAC. (48-b,l
sIoI)
44
PCMD
o
DIA m!eriace. Semd da1a(2'SCOMP,
MBS
hrst)
5
SOCK
I
Clock !np.t for read)ng SOSO.
6
MUTE
I
'H" at mut!ng, "L" al mulmg cance!.
7
SENS
o
SENS
s,gnal output to CPU.
8
XRST
I
System
reset
"L" af resen,ng.
9
DATA
I
lnDuts serial data from CPU.
I
1
45
PCMDI
I
Inputs aud,o data to DAC. (48-bd
slof)
46
BCK
o
DIA mteriace.
B,f clock.
I
47
BCKI
I
Inputs b,! clock to DAC. (48. b!l S!OI)
48
GTOP
o
Not
used
49
XUGF
o
Not
used
tu?M1
(
LIC&l
(
7CMDI
(
lcll
(
EzE===l
Sertal data latches al falfing edge.
Inputs serial data transfer
clock from CPU.
50
xPCK
o
Not used
ICK
(
rcx
D
(
LICE
(
.*CX(
I
I
I
I
I
Dlcl
l&L
D/l
OUT
I
lfi7Z1PAC1
nlCIIAL
CL1
11101
/
L
C0111C701
C?8
l?M
D?,
UOOULATO1
I
t
,
..
13
SEIN
I
inputs SENS
signal from SSP.
14
CNIN
I
Inputs track jump coun:
S!Qnal
15
DATO
o
Outputs
ser,al data 10 SSP
Outputs
latches
10 SSP.
16
XLTO
o
Serial data latches at falhng edge.
17
CLKO
o
Outputs
serial data transfer
clock to SSP.
78
TEST2
I
Pm for TEST.
Normal
used
Stal~
VDD,
19
SPOB
I
NoI
used
20
SPOC
I
Not
used
61
DOUT
o
Not used
62
EM~H
o
Stays
"H"
{or playback
dtsc
prov,ded
wtth
emohasm
or "L" for that wtthout emohasis.
21
SPOD
I
Not
used
22
XLON
o
Interface Ior extension of M.
processor(outpul
)
Focus
OK signal input pin.
23
FOK
I
Used servo auto seauencer
wdh
SENS outcwi.
E
63
64
65
66
EIJPHI
I
De-emphasw
ON/OFF
of DAC.
"H" at ON,
"L" at OFF.
wFCK
o
Not
used
ZEROL
o
Outputs
deteciton
for non-sound
dala.
"H" at detectton
for non.sound
daia (L-ch)
ZEROR
o
Outputs
detechon
for non.sound
dala.
"H" at detecilon for non-sound data
IR-ch)
rrca
(
24
MON
o
ONIOFF
control stgn.a for spindle motor.
J
KMPU
(
Crs
(
Xucr
(
Gtor
(
%R!F==i
O
Servo
control
s,gnti
fm spindle
motor.
Output
of hl!er for master
PLL. (Slave
= DIG :al
..
,'
67
DTS1
i
Normal used state "L".
~
Outputs PWM
for L-ch. (Pos,t,.e
Phase)
O.IpUts
PWM
for L-ch. (Nega!we
Phase)
Power
supply for L-ch
PWM
driver.
I
I
I --,
30
FILI
I
Inputs 10 falter {or master
PLL.
31
I
Pco
I
O
I OUtDuts of charoe
DUmD for master
PLL.
32
VDD
-
Power
supply
for dtg,tal ( + 5V)
33
Av~~,
-
Power
supply
for analog.
I
~
inputs X'lal oscillation cKcuIl (33.8666 MHz).
Outputs X tal oscdml$onc,rcwl (33.8686 MHz).
34
CLTV
I
VCO control voltage Input for master PLL.
35
AVOD1
-
Power
supply for analog.(
+ 5V)
36
RF
I
EFM
sianal mnut
76
Av~~2
-
\ GND.
I
Inputs
constant
current
for
asymmetry
37
BIAS
1
correction
c,rcuit.
77
NRPWM
o
Outputs PWM fof R-ch. (Negal!ve Phase)
76
RPWM
o
OutPuIs PWM {or R-ch. (Pos!five Phase)
79
DTS2
I
Normal used state 'L".
Normal used state 'L".
~
Inputs
comparator
voltage
lor
asymmetry
O
EFM Ml swing outPut.("L"
= VSS, "H" = VDa)
"L' : OFF of asymmeby
correction.
"H" : ON of asymmetry
correcbon.
1801 DTs31'1
I
I
I
I
I
I
-54-
-55-
EI
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