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DV-L70U
Terminal
Terminal name
56
VSS
57
VDD
58
PXDI (4)
59
PXDI (5)
60
PXDI (6)
61
PXDI (7)
62
TEST0
63
TEST1
64
VSS
• Block Diagram
9-16. IC1000 MB3800PV
Pin No.
Terminal name
1
-IN
2
SCP
3
VCC
4
BR/CTL
5
OUT
6
GND
7
OSC
8
FB
• Block Diagram
In/Output
–
Digital GND
–
Digital power +3.3V
Input
Input
Input
Input
Input
Test terminal
Input
Test terminal
–
Digital GND
12
15
21
18
10 11
HADAT
HADR
8
Edge
creation
SPT circuit
ITU-R
52 58
Source
PXDI
601/656
Dec.
8
55 61
interface
HSYNCI
50
1
VSYNCI
47
1
PXCLKI
Clock
51
Timing
Gen.
1
PXCLKO
generation
44
1
64pin LQFP
I/O
I
Error amplifier inversion input terminal
–
Capacitor connection terminal for soft start/SCP setting
–
Power terminal
I
Output current setting/control terminal
O
Totem pole type output terminal
–
Ground terminal
–
Capacitor/resistor connection terminal for oscillation frequency setting
O
Error amplifier output terminal
Vcc
3
0.6V
A source of
reference voltage
0.1V
1.25V
-IN
-
1
36k
+
Error Amp.
500
0.5V
FB
8
Soft start
S. C. P
6
GND
Function
CPU
2
7
29
28
27
26
30
31
HCS HAS HWR HRD
HIM MRST
8
1
1
1
1
1
Host interface
Digital
DR-SPT
dinamic
circuit
r circuit
Digital color correction
Color
White
offset
correction
correction
ITU-R
601/656
formatter
8
1
1
HSYNCO
VSYNCO
PXDO
46
45
34
39
42
43
NTSC Enc.
(3ch D/A built in)
Operation function
OSC
7
Sawtooth
oscillator
0.1V
PWM
Comp.
-
+
Output drive
+
control circuit
+
0.3V
DTC0.6V
2
4
SCP
BR/CTL
9-21
1
1 9
17
25
VDD
33 41
49 57
8
16
24 32
VSS
40 48
56 64
TEST0
62
TEST1
63
INT
22
WAIT
23
OUT
5
30k
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