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9-4. IC402 IX1474GE
Pin No.
Terminal name
1
DPCK1
2
DVDD3
3
SVCK1
4
SVCK0
5
DVSS
6
DVDD2
7
N.C.
8
HDWR
9
HDRD
10
ECCCS
11
D8
12
D9
13
D10
14
D11
15
D12
16
D13
17
D14
18
D15
19
DVSS
20
DVDD5
21
HINT
22
HA0
23
HA1
24
PLCK
25
ED0
26
ED1
27
ED2
28
ED3
29
ED4
30
ED5
31
ED6
32
ED7
33
TEST
34
PDON
35
PDOP
36
RLLD
37
LPFN
38
LPFO
39
VCOF
40
SLCO
41
AVSS
42
AVR
43
VRC
44
PVR
45
AVDD
46
RVR2
47
RVDD
48
RFIN
49
RVSS
50
RVR1
51
DVR
52
DMO
53
RASN
54
CASN
DEM/ECC (DVD)
I/O
Operation function
I
Signal processing reference clock input.
–
Digital power. (3.3V)
I
Servo reference clock input. (Oscillation circuit input terminal)
O
Servo reference clock output. (Oscillation circuit input terminal)
–
Digital power. (0V)
–
Digital power. (3.3V)
–
User use prohibited.
I
MPU write signal.
I
MPU read signal.
I
MPU chip selection.
I/O
MPU data bus.
I/O
MPU data bus.
I/O
MPU data bus.
I/O
MPU data bus.
I/O
MPU data bus.
I/O
MPU data bus.
I/O
MPU data bus.
I/O
MPU data bus.
–
Digital power. (0V)
–
Digital power. (5V)
O
MPU interruption signal. (Occurrence of interruption = "L")
I
MPU address bus.
I
MPU address bus.
I/O
Read channel clock input/output terminal.
–
User use is prohibited (N.C.) since it is for shipping adjustment.
–
–
–
–
–
–
–
I
For shipping adjustment.
O
PLL phase error signal output. (Negative polarity)
O
PLL phase error signal output. (Positive polarity)
O
RLL detection result output.
I
PLL loop filter amp. reverse input.
O
PLL loop filter amp. output.
O
VCO filter terminal.
O
Built-in comparator reference voltage output terminal.
–
Analog power. (0V)
O
Non-PLL system analog reference potential. (1.65V)
–
Resistance division point potential. (For analog reference
potential generation: 1.65)
O
PLL system analog reference potential. (1.65V)
–
Analog power. (3.3V)
–
2nd reference voltage. (For capacitor connection)
–
Exclusive-use power terminal. (3.3V)
I
RF signal input.
–
Exclusive-use power terminal. (0V)
–
1nd reference voltage. (For capacitor connection)
I
DMO reference potential. (1.65V recommended)
O
Disc equalizer output for DVD. (Triple value PWM + HiZ)
O
External RAM row address selection. (Negative logic)
O
External RAM row address selection. (Negative logic)
9-4
DV-L70U
Remarks
0.5-3.3Vp-p Feedback
resistor built in.
For logic cell
3.3V-I/F Feedback
resistor built in.
For logic cell
For logic cell
Open
TTL level
TTL level
TTL level
TTL level
TTL level
TTL level
TTL level
TTL level
TTL level
TTL level
TTL level
For I/O cell
For I/O cell
OPEN DRAIN
TTL level
TTL level
Open
Set to "L"
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