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DV-L70U
9-14. IC801 PCM1716E
Pin No.
Terminal name
1
LRCIN
2
DIN
3
BCKI
4
CLKO
5
XTI
6
XTO
7
DGND
8
V
DD
9
V
2R
CC
10
AGND2R
11
EXTR
12
NC
13
V
R
OUT
14
AGND1
15
V
1
CC
16
V
L
OUT
17
NC
18
EXTL
19
AGND2L
20
V
2L
CC
21
ZERO
22
RSTB
23
CS/IWO
24
MODE
25
MUTE
26
MD/DM0
27
MC/DM1
28
ML/IIS
Note: (1) Pins 22, 24, 25, 26, 27, and 28: With Schmidt trigger input pull-up resistor (2) Pin 23: With Schmidt trigger input pull-down resistor
(3) Pins 1, 2, and 3: Schmidt trigger input
• Block Diagram
3
BCKI
1
LRCIN
2
DIN
28
ML/IIS
27
MC/DM1
26
Mode
MD/DM0
23
CS/IWO
Control
24
MODE
25
MUTE
22
RSTB
AUDIO D/A CONVERTER
I/O
I
LRCK clock input (fs)
I
Data input
I
Bit clock input for data.
O
System clock buffered output.
I
Connection of crystal oscillator or external clock input.
O
Connection of crystal oscillator
–
Digital GND
–
Digital power +5V
–
Analog power +5V
–
Analog GND
O
Rch Analog output amp. • common
–
Not connected.
O
Rch Analog voltage output
–
Analog GND
–
Analog power +5V
O
Lch Analog voltage output
–
Not connected.
O
Lch Analog output amp. • common
–
Analog GND
–
Analog power +5V
O
Zero data • flug
I
Resetting. While this pin is in "L" state, the DF and delta -sigma modulator is in reset state.
I
Chip selection/input format selection
I
Mode control selection (H: Software, L: Hardware)
I
Mute control
I
Mode control data/deemphasis selection 1
I
Mode control BCK/deemphasis selection 2
I
Mode control latch/input format selection
Sirial
Input
8-time oversampling
I/F
digital filter with
function controller
I/F
Crystal OSC
5
XTI XTO
Operation function
(3)
(3)
(2)
(1)
Multilevel
delta/sigma
modulator
BPZ-Cont.
6
4
15
V
CLKO
CC
9-19
(1)
(1)
(2)
(1)
20 19
9
10
Low-pass
DAC
filter
Low-pass
DAC
filter
Open Drain
Power
14
8
7
1 AGND1
V
DGND
DD
(1)
16
V
L
OUT
18
EXTL
13
V
R
OUT
11
EXTR
21
ZERO
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