Post Code Checkpoints - ECS Z97 MACHINE User Manual

POST Code Checkpoints

The POST code checkpoints are the largest set of checkpoints during
the BIOS pre-boot process. The following table describes the type of
checkpoints that may occur during the POST portion of the BIOS :
Checkpoint Description
01-0F SEC Status Codes & Errors
10-2F PEI execution up to and including memory detection
30-4F PEI execution after memory detection
50-5F PEI errors
60-CF DXE execution up to BDS
D0-DF DXE errors
E0-E8 S3 Resume (PEI)
E9-EF S3 Resume errors (PEI)
F0-F8 Recovery (PEI)
F9-FF Recovery errors (PEI)
0 Not used
1 Power on. Reset type detection (soft/hard).
2 AP initialization before microcode loading
3 North Bridge initialization before microcode loading
4 South Bridge initialization before microcode loading
5 OEM initialization before microcode loading
6 Microcode loading
7 AP initialization after microcode loading
8 North Bridge initialization after microcode loading
9 South Bridge initialization after microcode loading
A OEM initialization after microcode loading
B Cache initialization
C-D Reserved for future AMI SEC error codes
E Microcode not found
F Microcode not loaded
10 PEI Core is started
11 Pre-memory CPU initialization is started
12 Pre-memory CPU initialization (CPU module specific)
13 Pre-memory CPU initialization (CPU module specific)
14 Pre-memory CPU initialization (CPU module specific)
15 Pre-memory North Bridge initialization is started
16 Pre-Memory North Bridge initialization (North Bridge module specific)
17 Pre-Memory North Bridge initialization (North Bridge module specific)
18 Pre-Memory North Bridge initialization (North Bridge module specific)
19 Pre-memory South Bridge initialization is started
1A Pre-memory South Bridge initialization (South Bridge module specific)
1B Pre-memory South Bridge initialization (South Bridge module specific)
1C Pre-memory South Bridge initialization (South Bridge module specific)
1D-2A OEM pre-memory initialization codes
2B Memory initialization. Serial Presence Detect (SPD) data reading
2C Memory initialization. Memory presence detection
2D Memory initialization. Programming memory timing information
2E Memory initialization. Configuring memory
2F Memory initialization (other).
30 Reserved for ASL (see ASL Status Codes section below)
31 Memory Installed
32 CPU post-memory initialization is started
33 CPU post-memory initialization. Cache initialization
34 CPU post-memory initialization. Application Processor(s) (AP) initialization
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