JVC LT-26DB1BU/AX Service Manual page 41

Integrated digital terrestrial/satellite lcd television
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MAIN PWB CIRCUIT DIAGRAM (10/28) [Douglas DDR Interface]
5
VDDR_MEM
D
SDDR_D0
F24
DDR_D0
SDDR_D1
M24
DDR_D1
SDDR_D2
J25
DDR_D2
SDDR_D3
K26
DDR_D3
SDDR_D4
M26
DDR_D4
SDDR_D5
E25
DDR_D5
SDDR_D6
L25
DDR_D6
SDDR_D7
F26
DDR_D7
SDDR_DM0
K24
DDR_DM0
SDDR_DQS0
H25
DDR_DQS0
SDDR_DQS0#
H26
DDR_DQS0_N
SDDR_D8
E29
DDR_D8
SDDR_D9
L29
DDR_D9
SDDR_D10
H28
DDR_D10
SDDR_D11
J29
DDR_D11
SDDR_D12
L27
DDR_D12
SDDR_D13
E27
DDR_D13
SDDR_D14
K28
DDR_D14
SDDR_D15
F28
DDR_D15
SDDR_DM1
J27
C
DDR_DM1
SDDR_DQS1
G28
DDR_DQS1
SDDR_DQS1#
G29
DDR_DQS1_N
SDDR_D16
Y24
DDR_D16
SDDR_D17
AF28
DDR_D17
SDDR_D18
AC25
DDR_D18
SDDR_D19
AD26
DDR_D19
SDDR_D20
AF26
DDR_D20
SDDR_D21
W25
DDR_D21
SDDR_D22
AE25
DDR_D22
SDDR_D23
Y26
DDR_D23
SDDR_DM2
AD24
DDR_DM2
SDDR_DQS2
AB25
DDR_DQS2
SDDR_DQS2#
AB26
DDR_DQS2_N
SDDR_D24
W29
DDR_D24
SDDR_D25
AE29
DDR_D25
SDDR_D26
AB28
DDR_D26
SDDR_D27
AC29
DDR_D27
SDDR_D28
AE27
DDR_D28
SDDR_D29
W27
DDR_D29
SDDR_D30
AD28
DDR_D30
SDDR_D31
Y28
DDR_D31
SDDR_DM3
AC27
DDR_DM3
SDDR_DQS3
AA28
DDR_DQS3
SDDR_DQS3#
AA29
DDR_DQS3_N
B
C268
C270
104p/16V/1005
104p/16V/1005
C267
104p/16V/1005
C269
C271
104p/16V/1005
104p/16V/1005
A
C286
C287
C285
102p/50V/1005
102p/50V/1005
102p/50V/1005
All location are from 251 to 320
5
4
VDDR_MEM
C251
104p/16V/1005
C252
104p/16V/1005
C254
105p/16V/1005
C253
102p/50V/1005
F23
DDR_VDDI
AD23
DDR_VDDI
M28
DLL_VAA0
V24
DLL_VAA1
SDDR_A0
P27
DDR_A0
SDDR_A1
U29
DDR_A1
SDDR_A2
R26
DDR_A2
SDDR_A3
U26
DDR_A3
SDDR_A4
P25
DDR_A4
SDDR_A5
T28
DDR_A5
SDDR_A6
R27
DDR_A6
SDDR_A7
V28
DDR_A7
SDDR_A8
R29
DDR_A8
SDDR_A9
T29
DDR_A9
SDDR_A10
V25
DDR_A10
SDDR_A11
R28
DDR_A11
V26
SDDR_A12
DDR_A12
SDDR_BA0
U28
DDR_BA0
SDDR_BA1
T27
DDR_BA1
SDDR_CAS
P24
DDR_CAS_N
SDDR_RAS
N26
DDR_RAS_N
SDDR_CS
N25
DDR_CS_N
SDDR_WE
T25
DDR_WE_N
P29
DDR_CK
N29
DDR_CK_N
U27
DDR_CKE
M27
DDR_ODT
U24
DDR_CAL
C23
RPLL_AVDD12
D22
DDRPLL_AVDD12
B22
RPLL_AGND
B23
RPLL_AVDD33
E22
DDRPLL_AVDD33
E21
DDRPLL_AGND
C22
RPLL_AGND
U112A
&MPEG2_ONECHIP FLI10610H
C272
C274
C276
C278
104p/16V/1005
104p/16V/1005
104p/16V/1005
104p/16V/1005
C273
C275
C277
104p/16V/1005
104p/16V/1005
104p/16V/1005
C288
C289
C290
C291
C292
102p/50V/1005
102p/50V/1005
102p/50V/1005
102p/50V/1005
102p/50V/1005
4
(No.YA698<Rev.001>)2-25
3
DDR_VRF
C256
R251
103p/50V/1005
1R0/2012
C257
C258
C259
103p/50V/1005
226p/6.3V/2012
226p/6.3V/2012
C255
R252
226p/6.3V/2012
1R0/2012
C260
C261
C262
103p/50V/1005
103p/50V/1005
226p/6.3V/2012
The CKE pull down is for power off
mode DDR self refresh
R262
100/F/1005
DDR_CLK
R263
100/F/1005
DDR_CLK_N
R276
103/F/1005
DDR_CKE
MAIN PWB (11/28)
DDR_CKE
R265
103/1005
DDR_ODT
R268
2940/F/1005
L251
+1V2
BLM18PG300SN1D
C263
C264
103p/50V/1005
103p/50V/1005
L252
+3V3_A
BLM18PG300SN1D
C265
C266
103p/50V/1005
103p/50V/1005
VDDR_MEM
C280
C282
C284
104p/16V/1005
104p/16V/1005
104p/16V/1005
C279
C281
C283
104p/16V/1005
104p/16V/1005
104p/16V/1005
C293
C294
C295
C296
102p/50V/1005
102p/50V/1005
102p/50V/1005
102p/50V/1005
C297
C298
C299
C300
105p/16V/1005
105p/16V/1005
226p/6.3V/2012
226p/6.3V/2012
3
2-26(No.YA698<Rev.001>)
2
+3V3_A
SDDR_D2
PR251
100*4/1005
DDR_D2
5
4
SDDR_D0
DDR_D0
6
3
SDDR_D7
DDR_D7
7
2
SDDR_D5
DDR_D5
8
1
SDDR_D4
PR252
100*4/1005
DDR_D4
5
4
SDDR_D1
DDR_D1
6
3
SDDR_D3
DDR_D3
7
2
SDDR_D6
8
1
DDR_D6
PR254
8
1
100*4/1005
SDDR_D15
DDR_D15
7
2
SDDR_D8
DDR_D8
6
3
SDDR_D13
DDR_D13
5
4
SDDR_D10
R272
100/1005
DDR_D10
SDDR_D11
R273
100/1005
DDR_D11
PR257
100*4/1005
8
1
SDDR_D12
DDR_D12
7
2
SDDR_D9
DDR_D9
6
3
SDDR_D14
DDR_D14
5
4
SDDR_D18
PR258
100*4/1005
DDR_D18
5
4
SDDR_D16
DDR_D16
6
3
SDDR_D23
7
2
DDR_D23
SDDR_D21
DDR_D21
8
1
SDDR_D17
PR260
100*4/1005
DDR_D17
5
4
SDDR_D22
DDR_D22
6
3
SDDR_D20
DDR_D20
7
2
SDDR_D19
DDR_D19
8
1
PR261
100*4/1005
8
1
SDDR_D31
DDR_D31
7
2
SDDR_D29
DDR_D29
6
3
SDDR_D24
DDR_D24
5
4
SDDR_D26
R274
100/1005
DDR_D26
SDDR_D27
R275
100/1005
DDR_D27
PR262
100*4/1005
8
1
SDDR_D28
7
2
DDR_D28
SDDR_D25
DDR_D25
6
3
SDDR_D30
DDR_D30
5
4
SDDR_DM0
R253
100/1005
DDR_DM0
SDDR_DM1
R257
100/1005
DDR_DM1
SDDR_DM2
R264
100/1005
DDR_DM2
SDDR_DM3
R269
100/1005
DDR_DM3
SDDR_DQS0
R254
100/1005
DDR_DQS0
SDDR_DQS0#
R255
100/1005
DDR_DQS0#
SDDR_DQS1
R259
100/1005
DDR_DQS1
SDDR_DQS1#
R261
100/1005
DDR_DQS1#
SDDR_DQS2
R266
100/1005
DDR_DQS2
SDDR_DQS2#
R267
100/1005
DDR_DQS2#
SDDR_DQS3
R270
100/1005
DDR_DQS3
SDDR_DQS3#
R271
100/1005
DDR_DQS3#
SDDR_A11
PR253
8
1
100*4/1005
DDR_A11
SDDR_A2
DDR_A2
7
2
SDDR_A8
DDR_A8
6
3
SDDR_A0
DDR_A0
5
4
SDDR_A5
PR255
100*4/1005
DDR_A5
8
1
SDDR_A4
DDR_A4
7
2
SDDR_A9
DDR_A9
6
3
SDDR_A6
DDR_A6
5
4
SDDR_A10
PR256
100*4/1005
DDR_A10
8
1
SDDR_A12
DDR_A12
7
2
SDDR_A3
DDR_A3
6
3
SDDR_A7
DDR_A7
5
4
SDDR_A1
R256
100/1005
DDR_A1
SDDR_BA0
R258
100/1005
DDR_BA0
SDDR_BA1
R260
100/1005
DDR_BA1
PR259
100*4/1005
5
4
SDDR_RAS
6
3
SDDR_CAS
7
2
SDDR_CS
8
1
SDDR_WE
R277
100/1005
Douglas DDR Interface
MAIN PWB ASS'Y (10/28)
[Douglas DDR Interface]
HU-71100005
2
1
MAIN PWB
DDR_D[31:0]
DDR_D[31:0]
(11/28)
D
C
DDR_DM0
DDR_DM1
DDR_DM2
DDR_DM3
DDR_DQS0
DDR_DQS0#
MAIN PWB (11/28)
DDR_DQS1
DDR_DQS1#
DDR_DQS2
DDR_DQS2#
DDR_DQS3
DDR_DQS3#
MAIN PWB
DDR_A[12:0]
DDR_A[12:0]
(11/28)
B
DDR_BA0
DDR_BA1
MAIN PWB (11/28)
DDR_RAS
DDR_CAS
DDR_CS
DDR_WE
A
1
lt-26_32db1bu_0514_8/30_0.0

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