Oki OKIPAGE 10e Maintenance Manual page 188

3.7 LED Head Control
When a paper form is made to arrive at the data write position on print start, the sending of data
to the LED head starts as synchronized with the page synchronous signal/line synchronous signal
(CPU internal signal).
Bit image data developed on the raster buffer of a memory are DMA-transferred to the register
of a video interface controller (CPU built-in) and then sent to the shift register of the LED head
in a serial transmission synchronized with the HDCLK-P signal.
When 1-dot line data (2496 bits) is completely shifted, it is latched by means of the HDLD-P signal,
causing LEDs to be driven by means of the STB1-N to STB4-N signals in 4-time division.
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