Alcatel-Lucent 1850 TSS-320 Turn-Up And Commissioning Manual page 76

Transport service switch
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Tests and Measurements
............................................................................................................................................................................................................................................................
c. Remove the MASTER matrix (in slot 10) and insert it again; after a brief transient,
Synchronism priority and Holdover (if present)
Purpose
Verify the efficiency of the synchronism (i.e., for the synchronisms that might be
preset in the configuration) priority list and the Holdover
Test instruments [see
Craft Terminal (E)
Pattern Generator/Error Detector ((A)
2-MHz station distribution signal (if present)
Accessories [see
Cable for synchronism P)
Craft Terminal cable (L)
Single-mode single-fiber splices (I) or (Q) according to the SFP/XFP type
Test Bench
Figure 3-17 Synchronism priority and holdover
Note:
connector is used
............................................................................................................................................................................................................................................................
3 - 5 0
check that no errors are read.
Table 3-1, "Instruments" (p.
Table 3-2, "Accessories" (p.
BLOCK DIAGRAM
Pattern Generator
Error Detector
2MHz Clock
Generator
E
Connect the instrument to pins 5 (RXP) and 9 (RXN) if SUB-D 9-pole
3-2)]
1850 TSS-320
Matrix "A"
STS-3c
LINE
STM-1
port
port
"A"
T1
T3
Timing and
synchronization
Holdover
R L
H OU SEK EEPI N G
1
1 3
5
1
6 9
2 5
1 4
R A
SH ELF I D
8
8
1
1
1 5
1 5
9
9
2
3
4
5
6
7
8
9
10
1 1
1 2
13
1 4
15
1
R
R
L
R
R
D B G
D B G
C
M
C
M
D BG
D BG
m
W
m
W
A T
A T
A B
A B
L N K
L N K
A C T
A C T
1
M
1
M
F D X
F D X
C O L
C O L
L N K
L N K
A C T
A C T
2
M
2
M
F D X
F D X
C O L
C O L
L N K
L N K
A C T
A C T
1
D S
1
D S
F D X
F D X
C O L
C O L
L N K
L N K
A C T
A C T
2
D S
2
D S
F D X
F D X
C O L
C O L
R
K
D B G
C
M
m
W
A T
A B
2 0
21
22
23
24
25
26
27
28
2 9
30
3 1
32
Local testing and operating sequence
3-2)]
Loop
T0
PSFA
PSFB
+
-
+
-
1 3
1 3
STU PA
STU PB
A UX C H A N NELS
1 3
1
2 5
1 4
1 6
17
1 8
19
3 7
G
2 MHz Clock
Note
Generator
3 9
3 3
34
3 5
36
Issue 1 March 2008
PN 8DG08136CAAA

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