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Socket-A Processor
Processor
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Supports AMD Athlon XP/Athlon/Duron processors
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Supports 200/266 MHz Front-Side Bus
Chipset
There are VIA KM266 Northbridge and VT8233 Southbridge in
this chipset in accordance with an innovative and scalable
architecture with proven reliability and performance. A few of
the chipset's advanced features are:
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An advanced V-Link memory controller architecture that
provides the bandwidth up to 266 MB/s and performance
necessary for even the most demanding Internet and
2D/3D graphics
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Support for an 4xAGP interface providing vivid 2D/3D
graphics and video performance.
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Two 168-pin DIMM slots for SDRAM memory modules
Memory
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Two 184-pin DIMM slots for DDR memory modules
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Support for 100/133 MHz memory bus
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Maximum installed memory is 2GB
Note: You cannot use SDRAM and DDR simultane-
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One CNR slot
Expansion Slots
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One 4X AGP slot for AGP 2.0-compliant interface
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Two 32-bit PCI slots for PCI 2.2-compliant bus interface
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Primary and Secondary PCI IDE channels
Onboard IDE
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Support for PIO (programmable input/output) modes
channels
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Support for Multiword DMA modes
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Support for Bus Mastering and Ultra DMA ATA 100
33/66/100 modes
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ATX power supply connector
Power Supply
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ACPI and previous PMU support, suspend switch, key-
and Power
Management
board power on/off
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Supports Wake on LAN
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Compliant AC97 2.2 specification
AC'97 Audio
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Supports 18-bit ADC (Analog Digital Converter) and DAC
Codec
(Digital Analog Converter) as well as 18-bit stereo full-
duplex codec
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Single cycle 128-bit 3D architecture
VGA
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128-bit 2D graphic engine
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8/16/32 MB frame buffer using system memory
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Supports AGP 4X 266 MHz mode up to 1GB/s bandwidth
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Supports 250MHz RAMDAC
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2D/3D resolutions up to 1920x1440
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Supports AGP Rev. 2.0 Spec. Compliant
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Built-in 10BaseT/100BaseTX Ethernet LAN
Built-in Ethernet
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LAN controller integrates Fast Ethernet MAC and PHY
LAN (optional)
compliant with IEEE802.3u 100BASE-TX, 10BASE-T and
ANSI X3.263 TP-PMD standards
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Compliant with ACPI 1.0 and the Network Device Class
Power Management 1.1
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High Performance provided by 100Mbps clock generator
and data recovery circuit for 100Mbps receiver
ously.
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