Memory Module (K5L6443Abm-Ad11) - LG -A120 Service Manual

3.4

Memory Module (K5L6443ABM-AD11)

Figure.3-4-1 K5L6443ABM-AD11 FUNCTIONAL BLOCK DIAGRAM
GENERAL DESCRIPTION
The K5L6433ABM is a MultiChip Package Memory which combines 64Mbit NOR Flash
Memory and 32M bit UtRAM2.
The 64Mb NOR Flash featuring single 1.8V power supply is a 64Mbit Synchronous Burst Multi
Bank Flash Memory organized as 4Mx16. The memory architecture of the device is designed to
divide its memory arrays into 135 blocks with independent hardware protection. This block
architecture provides highly flexible erase and program capability. The 64Mb NOR Flash consists
of sixteen banks. This device is capable of reading data from one bank while programming or
erasing in the other bank. Regarding read access time, the device provides an 14.5ns burst access
time and an 70ns initial access time at 54MHz. At 66MHz, the device provides an 11ns burst
access time and 70ns initial access time. At 83MHz, the device provides an 9ns burst access time
and 70ns initial access time. At 108MHz, the device provides an 7ns burst access time and 70ns
initial access time. The device performs a program operation in units of 16 bits (Word) and an
erase operation in units of a block. Single or multiple blocks can be erased. The block erase
operation is completed within typically 0.7sec. The device requires 15mA as program/erase current
in the extended temperature ranges.
SAMSUNG's UtRAM products are designed to meet the request from the customers who want to
cope with the fast growing mobile applications that need high-speed random access memory.
UtRAM is the solution for the mobile market with its low cost, high density and high performance
feature. device is fabricated by SAMSUNG¢s advanced CMOS technology using one transistor
memory cell. The device supports the traditional SRAM like asynchronous operation
(asynchronous page read and asynchronous write), the NOR flash like synchronous operation
(synchronous burst read and asynchronous write) and the fully synchronous operation
(synchronous burst read and synchronous burst write). These operation modes are defined
through the Confifuration Register Setting. It supports the special features for the standby power
saving. Those are the PAR(Partial Array Refresh) mode, DPD(Deep Power Down) mode and
26