JVC LT-26C31BJE Service Manual page 9

2.2.2 MAIN CPU PIN FUNCTION (IC001)
Pin No. Pin Name I/O
1 TCK I Test purpose
2 TMS I Test purpose
3 TDI I Test purpose
4 TDO O Test purpose
5 P2.8 I/O Remote control input
6 P2.9 I/O Mechanical power switch detection [Pushing:L]
7 P2.10 I/O IP error detection [Detection:L]
8 P2.11 I/O IP reset
9 P2.12 I/O Port for TV-LINK communication
10 P2.13 I/O Power ON/OFF [ON:L]
11 P2.14 I/O Protector detection [Detection:L]
12 P2.15 I/O Power condition check [ON:L]
13 VSS33 I GND
14 VDD33 I 3.3V
15 P4.5 I/O Port for TV-LINK communication
16 A20 O Memory bus address
17 A19 O Memory bus address
18 A18 O Memory bus address
19 A17 O Memory bus address
20 VSS25 I GND
21 VDD25 I 2.5V
22 A16 O Memory bus address
23 A8 O Memory bus address
24 A7 O Memory bus address
25 A9 O Memory bus address
26 A6 O Memory bus address
27 A5 O Memory bus address
28 A10 O Memory bus address
29 A11 O Memory bus address
30 A12 O Memory bus address
31 VSS33 I GND
32 VDD33 I 3.3V
33 A4 O Memory bus address
34 A3 O Memory bus address
35 A2 O Memory bus address
36 A1 O Memory bus address
37 A0 O Memory bus address
38 A13 O Memory bus address
39 RAS/A14 O Memory bus address
40 CAS/A15 O Memory bus address
41 VSS33 I GND
42 VDD33 I 3.3V
43 MEMCLK O Clock for memory
44 CSSDRAM O Chip select for memory
45 CLKEN O Clock enable for memory
46 CSROM O Chip select for memory
47 RD O Read for memory
48 UDQM O Control IN/OUT buffer of Memory (IC003)
49 LDQM O Control IN/OUT buffer of Memory (IC003)
50 WR O Write for memory
51 D15 I/O Data bus
52 VSS33 I GND
53 VDD33 I 3.3V
54 D7 I/O Data bus
55 D0 I/O Data bus
56 D14 I/O Data bus
57 D8 I/O Data bus
58 D6 I/O Data bus
59 D1 I/O Data bus
60 VSS33 I GND
61 VDD33 I 3.3V
62 D13 I/O Data bus
63 D9 I/O Data bus
64 D5 I/O Data bus
Pin No.
Remark
Pin Name I/O
65 D2 I/O Data bus
66 D12 I/O Data bus
67 D10 I/O Data bus
68 VSS33 I GND
69 VDD33 I 3.3V
70 D4 I/O Data bus
71 D3 I/O Data bus
72 D11 I/O Data bus
73 RSTIN I Reset
2
74 P3.0 I/O I C CLOCK 0 (for memory)
2
75 P3.1 I/O
I C DATA 0 (for memory)
76 P3.2 I Remote control input
77 P3.3 I/O Clock for OSD
78 P3.4 O Tuner system switch
79 P3.5 O Tuner system switch
80 P3.6 I Teletext mode:H
81 P3.7 I Power START
82 P3.8 I Not used
83 P3.9 I Picture mute
84 VSS33 I GND
85 VDD33 I 3.3V
86 VSS25 I GND
87 VDD25 I 2.5V
88 TXD0 I/O Sub micro computer communication
89 RXD0 I/O Sub micro computer communication
90 P3.12 I Not used
91 P3.13 I/O Not used
92 P3.15 I/O Not used
93 P5.14(YS2) I/O YS2 of SCART RGB
94 P5.15 I/O Headphone detection [Detection:L]
95 TRIG_IN I/O Not used
96 TRIG_OUT I/O Not used
97 P6.2 I Not used
2
98 P6.3 I/O I C bus clock for IC control
2
99 P6.4 I/O I C bus data for IC control
100 P6.5 I/O Multi-sound process reset
2
101 P6.6 I/O I C bus data for IC control
102 VSYNC O Vertical sync for OSD
103 HSYNC O Horizontal sync for OSD
104 COR/RSTOUT O Not used
105 BLANK O Ys for OSD/Teletext
106 VDD33 I 3.3V
107 VSS33 I GND
108 XTAL1 I 6MHz
109 XTAL2 O 6MHz
110 VSSA I GND
111 VDDA I Not used
112 R O R for OSD Teletext
113 G O G for OSD Teletext
114 B I B for OSD Teletext
115 VSSA I GND
116 VDDA I 2.5V
117 CVBS2 I Video for Teletext
118 VSSA I GND
119 VDDA I 2.5V
120 CVBS1B I Video for Teletext
121 CVBS1A I Video for Teletext
122 VSSA I GND
123 VDDA I 2.5V
124 P5.0 I AFT for tuner
125 P5.1(KEY1) I Key scan data 1 [ON:H]
126 P5.2 I AGC for tuner
127 P5.3(KEY2) I Key scan data 2 [ON:H]
128 TMODE I Test purpose
Remark
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