JVC KD-SH9101 Service Manual page 39

Cd receiver
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3 7 63 1515 0
4.5
BR24L32F-W-X (IC703) : EEPROM
• Pin layout
Vcc
A0
• Block diagram
A0
A1
A2
TE
L 13942296513
GND
4.6
BU4066BCFV-X (IC322,IC351) : Quad analog switch
• Pin layout & Block diagram
www
.
http://www.xiaoyu163.com
WP
SCL
SDA
A1
A2
GND
1
12bits
Address
2
12bits
decoder
START
3
Control logic
4
High voltage generator
VDD
C1
C4
14
13
12
1
2
3
x
ao
y
I/O1
O/I1
O/I2
i
http://www.xiaoyu163.com
8
• Block diagram
Symbol
A0A1A2
GND
SDA
SCL
WP
VCC
32kbit EEPROM array
Slave word
address register
STOP
ACK
Q Q
3
6 7
1 3
Vcc level detect
I/O4
O/I4
11
10
4
5
u163
I/O2
C2
.
2 9
9 4
2 8
I/O
Function
I
Slave address set
-
Ground (0V)
I/O
Slave and word address
Serial data input serial data output
I
Serial clock input
I
Write protect input
-
Power supply
8
Vcc
8bits
Data
7
WP
register
6
SCL
1 5
0 5
8
2 9
9 4
5
SDA
O/I3
I/O3
9
8
m
6
7
co
C3
Vss
9 9
2 8
9 9
(No.49841)1-39

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