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3 7 63 1515 0
IC BLOCK DIAGRAMS AND DESCRIPTIONS
MBM29LV002TC/004TC-90PTN(2M/4M bit Flash Memory)
1
A16
2
A15
3
A14
4
A13
5
A12
6
A11
7
A9
8
A8
9
WE
10
RESET
11
N.C.
12
RY/BY
13
N.C.
14
A7
15
A6
16
A5
17
A4
18
A3
19
A2
20
A1
TE
L 13942296513
Vcc
Vss
WE
RESET
CE
OE
www
A
~A
0
17
.
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40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
RY/BY
RY/BY
BUFFER
CONTROL
CIRCUIT
(COMMMAND
RESISTOR)
WRITE
CIRCUIT
LOW Vcc DET.
WRITE/ERASE
CIRCUIT
PULSE TIMER
x
ao
u163
y
i
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2 9
8
A17
VSS
N.C.
N.C.
A10
DQ7
DQ6
DQ5
DQ4
VCC
VCC
N.C.
DQ3
DQ2
DQ1
Description
Symbol
DQ0
A0~A17
Address unput
OE
DQ0~DQ7
Data input/output
VSS
CE
Chip enable
CE
OE
Output enable
A0
Write enable
WE
Q Q
3
6 7
1 3
1 5
ERASE
CIRCUIT
CHIP ENABLE/
OUTPUT ENABLE
CIRCUIT
Y DECODER
STB
X DECODER
co
.
9 4
2 8
Symbol
Description
RESET
Hardware reset
RY/BY
Ready/Busy output
Vss
Ground
Vcc
Power supply
N.C.
No connection
DQ
~DQ
0
7
0 5
8
2 9
9 4
2 8
INPUT/OUTPUT
BUFFER
STB
DATA LATCH
Y GATE
2,097,152
CELL
MATRIX
m
DTR-8.2
9 9
9 9
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