Kenwood TK-7302 Service Manual page 12

TK-7302/7302 V /7302H/7302H
( )
4. PLL Frequency Synthesizer
The PLL circuit generates the fi rst local oscillator signal
for reception and the RF signal for transmission.
4-1. PLL Circuit
The frequency step of the PLL circuit is 10 or 12.5kHz.
A 19.2MHz reference oscillator signal is divided at IC1 by
a fi xed counter to produce the 10 or 12.5kHz reference fre-
quency. The voltage controlled oscillator (VCO) output signal
is buffer amplifi ed by Q9, then multiplied by using a doubler
and divided by a programmable counter in IC1.
The divided signal is compared in phase with the 10 or
12.5kHz reference signal in the phase comparator in IC1.
The output signal from the phase comparator is filtered
IC1: PLL IC
1/N
PLL
DATA
REF
OSC
1/M
19.2MHz
4-3. Unlock Circuit
During reception, the 9RC signal goes high, the 9TC sig-
nal goes low, and Q711 turns on. Q713 turns on and a volt-
age is applied to the collector (9R). During transmission, the
9RC signal goes low, the 9TC signal goes high and Q712
turns on. Q714 turns on and a voltage is applied to 9T.
The MCU in the control unit monitors the PLL (IC1) LD
signal directly. When the PLL is unlocked during transmis-
sion, the PLL LD signal goes low. The MCU detects this
signal and makes the 9TC signal low. When the 9TC signal
goes low, no voltage is applied to 9T, and no signal is trans-
mitted.
Q713
9R
SW
Q711
SW
9RC
Fig. 9 Unlock circuit
12
V
( )
CIRCUIT DESCRIPTION
Phase Charge
comparator pump
IC2
OP
ASTC
AMP
Fig. 8 PLL circuit
9C
Q714
9T
SW
Q712
SW
9TC
LD
IC702 IC1
MCU PLL
PLL lock
: LD "H"
through a low-pass fi lter and passed to the VCO to control
the oscillator frequency.
4-2. VCO Circuit
The operating frequency is generated by Q6 in transmit
mode and Q4 in receive mode. The oscillator frequency is
controlled by applying the VCO control voltage, obtained
from the phase comparator to the varactor diodes (D4 and
D14 in transmit mode and D5 and D13 in receive mode) and
assist voltage to the (D6, D8 and D9 in transmit mode and
D7, D10 and D11 in receive mode).
The TX/RX pin is set high in receive mode causing Q5 to
turn off, and turn Q7 on. The TX/RX pin is set low in trans-
mit mode. The outputs from Q4 and Q6 are amplifi ed by Q9
and sent to the RF amplifi ers.
D6,D8,D9
LPF
D14,D4
D13,D5
Assist
voltage
D7,D10,D11
5. Control Circuit
The MCU carries out the following tasks:
1) Controls the WIDE, NARROW, TX/RX outputs.
2) Controls the Baseband IC (IC701).
3) Controls the PLL (IC1).
4) Controls the display unit.
BLED
GLED
RLED
MBL
Display unit
Fig. 10 Control circuit
Q3
Q6
Doubler
TX VCO
AMP
Q9
BUFF
AMP
Q4
RX VCO
Q5,Q7
T/R SW
IC1
PLL
C.DATA
R.DATA
SLK
IC702 IC701
MCU Baseband IC
IRQ
CSN
IC1
LED driver