LG 42LE5500 Service Manual page 41

Serial Flash
+3.3V_MEMC
IC9000
MX25L4005CM2I-12G
R9000 10
CS# 8 VCC
1
FRC_SPI_CZ
R9001 10 SO 7 HOLD#
2
FRC_SPI_DO
R9002 10K R9005
WP# 6 SCLK
3
GND 5 SI R9006
4
EAN61009401
URSA3_FLASH_MACRONIX
AVDD_PLL
+3.3V_MEMC
AVDD
+3.3V_MEMC
L9004
CIC21J501NE
L9005
CIC21J501NE
C9004 C9009
10uF 0.1uF
C9024
C9019
10uF
10uF
AVDD_MEMPLL AVDD_LVDS
+3.3V_MEMC
+3.3V_MEMC
L9000
L9006
CIC21J501NE
CIC21J501NE
C9000 C9005
C9025
C9020
10uF 0.1uF
10uF
10uF
VDDP
+3.3V_MEMC
L9001
CIC21J501NE
C9006 C9010 C9013 C9016 C9021
C9001
10uF 0.1uF 0.1uF 0.1uF 0.1uF
10uF
AVDD_DDR
+1.5V_MEMC
L9002
CIC21J501NE
C9007 C9011 C9014 C9017 C9022
C9002
10uF 0.1uF 0.1uF 0.1uF 0.1uF
10uF
VDDC
+1.26V_MEMC
L9003
CIC21J501NE
C9008 C9012 C9015 C9018 C9023
C9003
10uF 0.1uF 0.1uF 0.1uF 0.1uF
10uF
P9000
12505WS-04A00
1
22 R9003
2
22 R9004
3
4
5
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
IC9000-*1
W25X40BVSSIG
CS VCC
1 8
DO[IO1] HOLD
2 7
WP CLK
3 6
GND DI[IO0]
4 5
URSA3_FLASH_WINBOND_NEW
10 IC9000-*2
FRC_SPI_CK W25X40VSSIG
10
FRC_SPI_DI
CS VCC
1 8
DO HOLD
2 7
WP CLK
3 6
GND DIO
4 5
EAN35097301
URSA3_FLASH_WINBOND_OLD
FRC_A[0-12]
FRC_A[0]
FRC_A[1]
FRC_A[2]
FRC_A[3]
FRC_A[4]
FRC_A[5]
FRC_A[6]
C9029 C9032
FRC_A[7]
0.1uF 0.1uF
FRC_A[8]
FRC_A[9]
FRC_A[10]
FRC_A[11]
FRC_A[12]
FRC_BA0
FRC_BA1
FRC_BA2
C9030 C9033 C9034 C9035
0.1uF 0.1uF 0.1uF 0.1uF
FRC_MCLK
FRC_MCLKB
FRC_CKE
FRC_ODT
FRC_RASB
FRC_CASB
FRC_WEB
FRC_DDR3_RESETB
C9026
0.1uF
FRC_DQSL
FRC_DQSU
FRC_DQSLB
FRC_DQSUB
FRC_DML
FRC_DMU
FRC_DQL[0]
FRC_DQL[1]
FRC_DQL[2]
FRC_DQL[3]
FRC_DQL[4]
C9027 C9031
FRC_DQL[5]
0.1uF 0.1uF
FRC_DQL[6]
FRC_DQL[7]
FRC_DQL[0-7]
FRC_DQU[0]
FRC_DQU[1]
FRC_DQU[2]
FRC_DQU[3]
FRC_DQU[4]
FRC_DQU[5]
FRC_DQU[6]
FRC_DQU[7]
FRC_DQU[0-7]
R9011
R9012
R9013
R9014
R9015
R9016
URSA3_SDA
URSA3_SCL
SCL3_3.3V
22 R9007
SDA3_3.3V
22 R9008
OPT
URSA3_SCL SCL1_3.3V
22 R9009
OPT
URSA3_SDA SDA1_3.3V
22
R9010
C9038
22pF
X9000
12MHz
R9029
1M
R9017 R9023
100 100
R9018 R9024
100 100
R9019 R9025
100 100
R9020 R9026
100 100
R9021 R9027
100 100
R9022 R9028
100 100
E2
DDR3_A0/DDR2_NC
U6
DDR3_A1/DDR2_A6
E3
DDR3_A2/DDR2_A7
G2
DDR3_A3/DDR2_A1
R4
DDR3_A4/DDR2_CASZ
G1
DDR3_A5/DDR2_A10
U5
DDR3_A6/DDR2_A0
F3
DDR3_A7/DDR2_A5
T5
DDR3_A8/DDR2_A2
F1
DDR3_A9/DDR2_A9
R6
DDR3_A10/DDR2_A11
R5
DDR3_A11/DDR2_A4
T6
DDR3_A12/DDR2_A8
G3
DDR3_BA0/DDR2_BA2
U4
DDR3_BA1/DDR2_ODT
E1
DDR3_BA2/DDR2_A12
U1
DDR3_MCLK/DDR2_MCLK
U2
DDR3_MCLKZ/DDR2_MCLKZ
T4
DDR3_CKE/DDR2_RASZ
H2
DDR3_ODT/DDR2_BA1
J1
DDR3_RASZ/DDR2_WEZ
H3
DDR3_CASZ/DDR2_CKE
H1
DDR3_WEZ/DDR2_BA0
F2
DDR3_RESET/DDR2_A3
LGE7378A[FRC_TCON_URSA3]
M3
DDR2_DQS0/DDR3_DQS0
N2
DDR2_DQS1/DDR3_DQS1
N1
DDR2_DQSB0/DDR3_DQSB0
N3
DDR2_DQSB1/DDR3_DQSB1
R2
DDR2_DQ7/DDR3_DQM0
K3
DDR2_DQ11/DDR3_DQM1
K2
DDR2_DQ6/DDR3_DQ0
R3
DDR2_DQ0/DDR3_DQ1
K1
DDR2_DQ1/DDR3_DQ2
T1
DDR2_DQ2/DDR3_DQ3
J2
DDR2_DQ4/DDR3_DQ4
T3
DDR2_NC/DDR3_DQ5
J3
DDR2_DQ3/DDR3_DQ6
T2
DDR2_DQ5/DDR3_DQ7
P2
DDR2_DQ8/DDR3_DQ8
L3
DDR2_DQ14/DDR3_DQ9
R1
DDR2_DQ13/DDR3_DQ10
L1
DDR2_DQ12/DDR3_DQ11
P1
DDR2_DQ15/DDR3_DQ12
L2
DDR2_DQ9/DDR3_DQ13
P3
DDR2_DQ10/DDR3_DQ14
M1
DDR2_DQM1/DDR3_DQ15
M2
DDR2_DQM0/DDR3_NC
100 C9
I2CM_SDA
100 D9
I2CM_SCL
100 P7
I2CM_SDA2_L
100 N8
I2CM_SCL2_L
100 P9
I2CM_SDA2_R
100 N10
I2CM_SCL2_R
AVDD AVDD_DDR AVDD_LVDS AVDD_PLL VDDC
AVDD_MEMPLL
VDDC
L9007
CIC21J501NE
C9037
C9036
10uF 0.1uF
Separate DVDD_DDR Power
C9039
FRC OPTION LOW HIGH
22pF
K14 NON_MIRROR MIRROR
T10 LVDS MINI_LVDS
R10 GIP NON_GIP
R9 SCAN_OFF SCAN_ON
U10
LD NON_LD
+3.3V_MEMC
IC9001
VDDP
LD_SCAN
SCAN_BLK2
R9038 100
LD_SCAN
R9039
100
SCAN_BLK1/OPC_OUT
+3.3V_MEMC
SW9000
JTP-1127WEM
1 2
3 4
R9041
820
CHANNEL CHECK!
B14
A0P/RV0+ RXA0+
A14
A0M/RV0- RXA0-
C14
A1P/RV1+ RXA1+
C15
RXA1-
A1M/RLV1-
A15
A2P/RV2+ RXA2+
B15
RXA2-
A2M/RV2- A
B16
ACKP/R3+ RXACK+
A16
RXACK-
ACKM/RV3-
A17
A3P/RV4+ RXA3+
B17
RXA3-
A3M/RV4-
C16
A4P/RV5+ RXA4+
C17
RXA4-
A4M/RV5-
D16
B0P/RV6+ RXB0+
D17
B0M/RV6- RXB0-
D15
B1P/RV7+ RXB1+
E15
B1M/RV7- RXB1-
F16
B2P/RV8+ RXB2+
F17
B
RXB2-
B2M/RV8-
F15
BCKP/WPWM RXBCK+
G15
RXBCK-
BCKM/OPT_P
G17
B3P/OPT_N RXB3+
G16
RXB3-
B3M/FLK
H16
B4P/GCLK6 RXB4+
H17
RXB4-
B4M/GLCK5
H15
C0P/LV0+ RXC0+
J15
C0M/LV0- RXC0-
J17
C1P/LV1+ RXC1+
J16
C1M/LV1- RXC1-
K16
C2P/LV2+ RXC2+
K17
RXC2-
C2M/LV2-
K15
CCKP/LV3+ RXCCK+
L15
RXCCK-
CCKM/LV3-
L17
C3P/LV4+ RXC3+
L16
RXC3-
C3M/LV4-
M16
C4P/LV5+ RXC4+
M17
RXC4-
C4M/LV5-
M15
D0P/LV6+ RXD0+
N15
D0M/LV6- RXD0-
N17
D1P/LV7+ RXD1+
N16
D1M/LV7- RXD1-
P15
D2P/LV8+ RXD2+
R15
RXD2-
D2M/LV8-
R17
DCKP/GOE RXDCK+
R16
RXDCK-
DCKM/GSC/GCLK3
T16
D3P/GSP_R RXD3+
T17
RXD3-
D3M/GSP
T15
D4P/SOE RXD4+
U17
RXD4-
D4M/POL
P16
GCLK4
P17
GCLK2
D1
I2CS_SDA URSA3_SDA
D2
I2CS_SCL
URSA3_SCL
P14
PWM0 FRC_PWM0
R14
FRC_PWM1
PWM1
R9043
B13 0
V_SYNC
LPLL_FBCLK
U16 OPT
LPLL_OUTCLK
A13
LPLL_REFIN
+3.3V_MEMC
R9040
0
FRC_CONF0
FRC_CONF1
FRC_PWM1
FRC_PWM0
FRC_PWM1
FRC_PWM0
I2C ADR: GPIO1: HI:B8 LOW:B4
CHIP_CONF: {GPIO8, PWM1, PWM0}
CHIP_CONF= 3 d5: boot from internal SRAM
CHIP_CONF= 3 d6: boot from EEPROM
CHIP_CONF= 3 d7: boot from SPI Flash
COMMON 2009.09.11
URSA3 (L.D.) 94