Block Diagram - Servo Section - Sony MDS-M100 Service Manual

MDS-M100
6-2. BLOCK DIAGRAM – MD SERVO Section –
HR901
OVER WRITE HEAD
I I
1
J J
2
F
B
C B
I J
D A
A
A
4
B
5
E
C
6
DETECTOR D
7
C
D
E
E
8
F F
9
LASER DIODE
AUTOMATIC
APC
ILCC
POWER
11
CONTROL
Q162, 163
PD LD
LASER ON
PD
PD
SWITCH 10
Q101
OPTICAL PICK-UP
(KMS-260A/J1NP)
FOCUS/TRACKING COIL DRIVE,
SPINDLE/SLED MOTOR DRIVE
IC152
PSB
6 OUT4F IN4R
M101
M
(SPINDLE)
8 OUT4R IN4F
27 OUT2F IN2F
M102
M
(SLED)
25 OUT2R IN2R
2-AXIS
DEVICE
FCS+
21 OUT1F IN1F
23 OUT1R IN1R
FCS–
TRK+
12 OUT3F IN3F
TRK–
10 OUT3R IN3R
MOD
HF MODULE
05
DIGITAL SIGNAL PROCESSOR,
EFM/ACIRC ENCODER/DECODER,
SHOCK PROOF MEMORY CONTROLLER,
ATRAC ENCODER/DECODER
OVER WRITE
IC121 (1/2)
HEAD DRIVE
IC181, Q181, 182
SCTX
RF AMP,
FOCUS/TRACKING ERROR AMP
IC101
48 47
RFO AGCI RF
RF AGC
RF AMP 46 40 38
& EQ
EQ
B.P.F. AUX
33
WBL
3T TEMP
PEAK
37
PEAK &
BOTM
BOTTOM
36
WBL
ADFM ADIN
ADFG
AT
29 30 32
B.P.F.
AMP
I-V
ABCD
ABCD
AMP 35
AMP
FE
FOCUS
34
ERROR AMP
TE
26
I-V TRACKING
SE
AMP ERROR AMP
28
COMMAND
LD/PD
AMP
SERIAL/
PARALLEL
V-I CONVERTER,
CONVERTER DECODER
12 20 16 17 18
16
SPFD
3
SPRD
13 67 65 66 75 74
4
RECP
APCREF AUTOMATIC
83
POWER
CONTROL
SFDR ANALOG MUX
29 92
SRDR
30 91
A/D CONVERTER
DIGITAL
SERVO
SIGNAL
FROM CPU
PROCESS
FFDR
INTERFACE
19 88
FRDR
18 89
AUTO
SEQUENCER
TFDR
14 86
DIGITAL SERVO
TRDR
15 85
SIGNAL PROCESSOR
IC121 (2/2)
– 37 –
15
IC121 (1/2)
TX
EFMO
100
FILI
60
PCO
59
PLL
CLTV
62
FILO
61
ASYO
53
ASYI
54
COMPA-
RFI
RATOR
57
SUBCODE
ADIP PROCESSOR
78 DEMODULATOR/
DECODER
CPU
F0CNT SPINDLE INTERFACE
79
SERVO
94 93 10 12 11 14 9 8
18 5 23 71 32
70 LDON
73 DIG-RST
67 WR-PWR
76 MOD
54 55
63 64
5 6
IN1 IN2
LOADING
MOTOR DRIVE
IC441
OUT1 OUT2
2 10
M
M103
(LOADING)
XLRF XLAT
80
CKRF SCLK
81
DTRF SWDT
82
HF MODULE
SWITCH
IC103, Q102 – 104
ADDT
25
DATAI
22
SAMPLING
XBCKI
RATE
24
CONVERTER
LRCKI
23
DIN0
19
DIGITAL
DIN1 WAVE SHAPER
AUDIO 20
IC601 (1/2)
DOUT
INTERFACE
21
DADT
26
28 27 29
OSCI
16
CLOCK
OSCO
GENERATOR
17
INTERNAL BUS
MONITOR
CONTROL
5 6 7 1 2 3 4
XOE
43
XWE
47
XRAS
46
XCAS
44
31 33 75 78 72 74 66
SCTX 80
SYSTEM CONTROLLER
IC501 (1/2)
UNREG
+12V
LIMIT-IN
77
REFERENCE
VZ REC-P 59
4 VOLTAGE SWITCH
Q441, 442
PACK-OUT 53
56 LD-LOW
PB-P 60
REFLECT 69
PROTECT 68
– 38 –
ADDT
A
(Page 39)
DIGITAL IN
OPTICAL
RECEIVER
IC611
DADT, BCK, LRCK
B (Page 39)
512FS
DIVIDER
C (Page 39)
IC123
D-RAM
IC124
16 XOE
3 XWE
4 XRAS
17 XCAS
• SIGNAL PATH
: PLAY (ANALOG OUT)
: REC (ANALOG IN)
: REC (DIGITAL IN)
S101
(LIMIT IN)
S601
(REC POSITION)
S602
(PACK OUT)
S604
(PLAY POSITION)
S102
(REFLECT/PROTECT DETECT)
HIGH REFELECT RATE/
WRITE PROTECT
LOW REFELECT RATE/
UN-PROTECT