Table of Contents
Advertisement
6-1.
BLOCK DIAGRAM – SERVO Section –
HR901
OVER WRITE HEAD
48
OPTICAL PICK-UP BLOCK
(KMS-260B)
I
I
1
RF AMP
J
J
2
F
B
C
B
I
J
D
A
A
A
4
B
5
I-V
C
E
6
AMP
D
DETECTOR
7
C
D
E
E
8
I-V
F
F
AMP
9
AUTOMATIC
ILCC
APC
LD/PD
POWER CONTROL
11
AMP
Q121, 122
PD
LD
LASER DIODE
LASER ON
PD
PD
SWITCH
10
Q101
FOCUS/TRACKING COIL DRIVE,
SPINDLE/SLED MOTOR DRIVE
IC141
16
PSB
SPFD
6
OUT4F
IN4R
3
M101
M M
SPRD
(SPINDLE)
8
OUT4R
IN4F
4
27
OUT2F
IN2F
29
M102
M
(SLED)
25
OUT2R
IN2R
30
2-AXIS
DEVICE
FCS+
21
OUT1F
IN1F
19
23
OUT1R
IN1R
18
FCS–
TRK+
12
OUT3F
IN3F
14
TRK–
10
OUT3R
IN3R
15
MOD
HF MODULE
SECTION 6
DIAGRAMS
DIGITAL SIGNAL PROCESSOR,
EFM/ACIRC ENCODER/DECODER,
SHOCK PROOF MEMORY CONTROLLER,
ATRAC ENCODER/DECODER
IC151 (1/2)
OVER WRITE
HEAD DRIVE
IC181, Q181, 182
SCTX
47
RF AMP,
FOCUS/TRACKING ERROR AMP
IC101
RFO
AGCI
RF AGC
RF
46
40
38
& EQ
EQ
WBL
B.P.F.
AUX
33
3T
PEAK
37
TEMP
PEAK &
BOTM
BOTTOM
36
WBL
ADFM
ADIN
ADFG
AT
B.P.F.
29
30
32
AMP
ABCD
ABCD
35
AMP
FOCUS
FE
34
ERROR AMP
TE
26
TRACKING
SE
ERROR AMP
28
COMMAND
SERIAL/PARALLEL
V-I
F0CNT
20
CONVERTER,
CONVERTER
DECODER
12
16
17
18
83
10
13
67 65 66 75 74 63 64
RECP
XRST
AUTOMATIC
POWER
CONTROL
SFDR
92
ANALOG MUX
SRDR
91
A/D CONVERTER
DIGITAL SERVO
SIGNAL
FROM CPU
FFDR
PROCESS
88
INTERFACE
FRDR
89
XLRF
80
CKRF
SCLK
AUTO
81
SEQUENCER
DTRF
SWDT
82
TFDR
86
DIGITAL SERVO
TRDR
85
SIGNAL PROCESSOR
IC151 (2/2)
15
IC151 (1/2)
TX
EFMO
100
FILI
60
PCO
59
PLL
CLTV
62
FILO
61
ASYO
53
ASYI
54
COMPA-
RFI
RATOR
57
SUBCODE
PROCESSOR
ADIP
78
DEMODULATOR/
DECODER
CPU
INTERFACE
F0CNT
SPINDLE
79
SERVO
94 93
12 11
14
9
8
5 6 7
25
27
32
48 40
38
42 50
COMPARATOR
IC102
IOP
133
29
LDON
47
DIG-RST
35
WRPWR
14
MOD
12 13
5
6
LOADING
MOTOR DRIVE
CLAMP
4
VOLTAGE SWITCH
IC440
2
10
M
XLAT
M103
(LOADING)
HF MODULE
SWITCH
Q131 – 134
31
31
ADDT
25
SAMPLING
DATAI
DATA
22
RATE
XBCKI
BCK
CONVERTER
24
LRCKI
LRCK
23
WAVE
DIN0
19
SHAPER
DIGITAL
IC600
DIN1
AUDIO
20
INTERFACE
DOUT
21
DADT
26
XBCK
28
LRCK
27
FS256
29
OSCI
16
CLOCK
OSCO
GENERATOR
17
D-RAM
IC153
INTERNAL BUS
MONITOR
CONTROL
1 2 3 4
XOE
43
22
OE
XWE
47
3
WE
SWDT
XRAS
46
4
RAS
SCLK
XCAS
44
23
CAS
58 56
RXO (CLIP)
44 45
TX0 (CLIP)
44
CLK (CLIP) 46
LRCKI 34
SYSTEM CONTROLLER
IC1 (1/2)
LIMIT-IN
30
+5V
REFERENCE
REC-SW
43
Q440, 444
11
LD-LOW
OUT-SW
51
PLAY-SW
49
REFLECT SW
67
PROTECT SW
68
MDS-S9
(Page 32)
ADDT
A
OPTICAL
DIGITAL
RECEIVER
IN
IC611
(Page 32)
DADT, BCK, LRCK
B
1024FS
DIVIDER
C
IC171
(Page 32)
SWDT, SCLK
D
(Page 32)
DATA
BCK
LRCK
• SIGNAL PATH
: PLAY (ANALOG OUT)
: REC (ANALOG IN)
: REC (DIGITAL IN)
S101
(LIMIT IN)
S105
(REC POSITION)
S103
(PACK OUT)
S104
(PLAY POSITION)
–1
S102-1
(REFELECT RATE DETECT)
S102-2
–2
(PROTECT DETECT)
S102
Advertisement
Table of Contents
