Sony MZ-E505 Service Manual page 35

• IC801 CXD2671-210GA (SYSTEM CONTROLLER, DIGITAL SIGNAL PROCESSOR, 16M BIT D-RAM)
Pin No.
Pin Name
1
SCS1
2
SI1
3
SO1
4 SCK1
5
78 DD CTL
6
MCUVDD0
7
MIFVSS3
8 XRST
9
S MON
10
VB MON
11
CHG MON
12 VREF MON
13 SET KEY 1
14 SET KEY 2
15 VL MON
16 HIDC MON
17
WK DET
18
REC KEY
HALF LOCK
19
SW
20
RMC KEY
21
AVDD
22 AVSS
23 VDIOSC
24
OSCI
25
OSCO
26
VSIOSC
27
DAVDD
28
VREFL
29
AOUTL
30
AOUTR
31
VREFR
32
DAVSS
33
ASYO
34 ASYI
35
AVD1
36 BIAS
37
RFI
38
AVS1
39 PCO
40 PDO
41
FILI
42 FILO
43 CLTV
44 PEAK
I/O
—
Not used
—
Not used
—
Not used
— Not used
—
Not used
—
Power supply terminal (for microcomputer block) (+1.5V)
—
Ground terminal (for microcomputer I/F)
I System reset signal input terminal from the power control "L": reset
I
Servo signal monitor input terminal (A/D input) from RF amp
I
Voltage monitor input terminal of UNREG power supply (A/D input)
I
Charge voltage monitor input terminal (A/D input) Not used
I Clear reference monitor voltage input terminal (A/D input) from RF amp
I Key input terminal from the switch & LCD module (A/D input)
I Key input terminal (A/D input) Not used
I VL voltage monitor input terminal (A/D input)
I HIGH DC voltage monitor input terminal (A/D input)
I
Set key start switching detection signal input terminal (A/D input) Not used
I
REC key input terminal (A/D input) Not used
I
Open/close detection switch of the upper panel input terminal "L": when upper panel close
I
Key input terminal (A/D input) from the remote commander attached headphone
—
Power supply terminal (for the analog circuit block) (+2.3V)
—
Ground terminal (for the analog circuit block)
—
Power supply terminal (for OSC cell) (+2.3V)
I
System clock (45.1584MHz) input terminal
O
System clock (45.1584MHz) output terminal
—
Ground terminal (for OSC cell)
—
Power supply terminal (for the built-in D/A converter) (+2.3V)
I Reference voltage input terminal (for the internal D/A converter L-CH)
O
Built-in D/A converter (L-CH) output terminal
O
Built-in D/A converter (R-CH) output terminal
I
Reference voltage input terminal (for the built-in D/A converter R-CH)
—
Ground terminal (for the built-in D/A converter)
O
Playback EFM duplex signal output terminal
I Playback EFM comparison slice level input terminal
—
Ground terminal (for the analog) (+2.3V)
I Bias current input terminal for the playback EFM comparison
I
Playback EFM RF signal input from RF amp
—
Ground terminal (for the analog)
O Phase comparison output terminal for the playback EFM system master PLL
O Phase comparison output terminal for the analog PLL Not used
I
Filter input terminal for the playback EFM system master PLL
O Filter output terminal for the playback EFM system master PLL
I Internal VCO control voltage input for the playback EFM system master PLL
I Peak hold signal input of the light amount signal (RF/ABCD) from RF amp
Description
MZ-E505
35