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NEC DB2000 Service Manual page 19

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IC201 LMX2331L IF-PLL
13MHz
8
DIV
1Mhz
CLK
13
PHASE
DIFFERENCE
(CURRENT)
GSM_TX ="1"= 180Mhz
GSM_TX ="0"= 270Mhz
The RX IF Synthesiser
The IF synthesiser (IF- PLL) is contained within IC201 - LMX2331L. It is used to
tune the 540Mhz TX/RX IF oscillator inside IC300.
The 540Mhz oscillator output is first divided down by a factor of 3 within IC300.
This is achieved by an internal pre-selectable divider, which is set by the signal
GSM_TX from IC27 #23. In receive mode the signal is high, which sets the divider
to 3 so therefore the 540Mhz is reduced to 180 Mhz, which is output on pins #23
and #24. This signal is then fed to #16 of IC201, where it is then divided down by
a factor of 180 to give a 1Mhz signal.
A 1Mhz reference signal derived from the 13Mhz clock is input to the phase
comparator and compared with the 1Mhz signal derived from the 270Mhz signal.
The phase comparator then derives a current phase difference of the two signals
and outputs it to the loop filter on pin #18 of the device.
The loop filter (C218, C219, C220,R202,R204 & L205) then uses the current
phase difference to produce a voltage phase difference and outputs this to the
Varactor network (D303 A/B).
The Varactor network and circuit at #33-35 form part of the 540Mhz oscillator
circuit, which is tuned by the phase voltage applied to the network.
The control signal:
PUPLO2
ON or OFF.
Fig.4:The IF Synthesiser (RX)
PHASE
COMPARATOR
1Mhz
DIV 180
18
PHASE
DIFFERENCE
(VOLTAGE)
LOOP
FILTER
GND
from IC27 #26 is used to switch the 540Mhz signal
180Mhz
23-24
16
GSM_TX
32
33
D303B
D303A
34-35
IC300
180Mhz
2
540Mhz
31
PUPLO2

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