Digital Signal Processor For Dolby Digital (Ac-3) / Dts Audio Decode - JVC RX-5030VBK Service Manual

4.19 TC9446F-025 (IC631): Digital signal processor for dolby digital (AC-3) / DTS audio decode
• Pin Function
Pin No. Symbol
1 RST
2 MIMD
3 MICS
4 MILP
5 MIDIO
6 MICK
7 MIACK
8~11 FI0~3
12 IRQ
13 VSS
14 LRCKA
15 BCKA
16~18 SDO0~2
19 SD03
20 LRCKB
21 BCKB
22 SDT0
23 SDT1
24 VDD
25 LRCKOA
26 BCKOA
27, 28 TEST0,1
29~30 LRCKOBBCKOB
31 TXO
32, 33 TEST2,3
34 RX
35 VSS
36 TSTSUB0
37 FCONT
38, 39 TSTSUB1TSTSUB2
40 PDO
41 VDDA
42 PLON
43 AMPI
44 AMPO
45 CKI
46 VSSA
47 CKO
48 LOCK
49 VSS
50 WR
51 OE
52 CE
53 VDD
54~61 IO7~0
62 VSS
63~70 AD0~7
71 VDD
72~80 AD8~16
81 VSS
82~89 PO0~7
90 VDDDL
91 LPFO
92, 93 DLON,DLCKS
94 SCKO
95 VSSDL
96 SCKI
97 VSSX
98, 99 XO,XI
100 VDDX
DLCKS terminal
I/O
I Reset signal input terminal (L:reset H: normal operation)
I Microcomputer interface mode selection input terminal (L:serial H:IC bus)
I Microcomputer interface chip select input terminal
I Microcomputer interface latch pulse input
I/O Microcomputer interface data I/O terminal
I Microcomputer interface clock input terminal
O Microcomputer interface acknowledge output terminal
I Flag input terminal 0~3
I Interrupt input terminal
- Digital ground terminal
I Audio interface LR clock input terminal A
I Audio interface bit clock input terminal A
O Audio interface data output terminal 0
- Non connect
I Audio interface LR clock input terminal B
I Audio interface bit clock input terminal B
I Audio interface data input terminal 0
I Audio interface data input terminal 1
- Power supply for digital circuit
O Audio interface LR clock output terminal A
O Audio interface bit clock output terminal A
I Test input terminal 0/1 (L:test H: normal operation)
- Non connect
O SPDIF Output
I Test input terminal (L:test H: normal operation)
I SPDIF input terminal
- Ground terminal for digital circuit
I Test sub input terminal 0 (L:test H: normal operation)
O VCO Frequency control output terminal
I Test sub input terminal 12 (L:test H: normal operation)
O Phase detect signal output terminal
- Power supply for analog circuit
I Clock selection input terminal (L:external clock H:VCO clock)
I amplifier input terminal for LPF
O amplifier output terminal for LPF
I External clock input terminal
- Ground terminal for analog circuit
O DIR Clock output terminal
O VCO Lock output terminal
- Ground terminal for digital circuit
O External SRAM writing signal output terminal
O External SRAM output enable signal output terminal
O External SRAM chip enable signal output terminal
- Power supply terminal for digital circuit
I/O External SRAM data I/O terminal 7~0
- Ground terminal for digital circuit
O External SRAM address output terminal 0~7
- Power supply terminal for digital circuit
O External SRAM address output terminal 8~16
- round terminal for digital circuit
O General purpose output terminal 0~7
- Power supply terminal for DLL
O LPF output terminal for DLL
I Refer to the undermentioned table
- Non connect
- Ground terminal for DLL
I External system clock input terminal
- Ground terminal for oscillation circuit
I/O Oscillation I/O terminal
- Power supply terminal for oscillation circuit
DLON terminal
L L
L H
H L
H H
Function
DLL clock setting
SCKI input (DLL circuit OFF)
Four times XI clock
Three times XI clock
Six times XI clock
RX-5030VBK
(No.22025)1-25