JVC MX-DVA9 Service Manual page 69

TC7SH08FU-X (IC311) : Timing control
1.Terminal layout
IN B
1
IN A
2
GND
3
TC74VHC00FT-X (IC322,IC503) : Write timing control
1.Terminal layout / Block diagram
Vcc 4B 4A
14 13 12
1 2 3
1A 1B 1Y
TC74VHC125FT-X (IC411) : Buffer
1. Pin layout & block diagram
1G 1
1A 2
1Y 3
2G 4
2A 5
2Y 6
GND 7
5 VCC
4
OUT Y
4Y 3B 3A 3Y
11 10 9 8
4 5 6
7
2A 2B 2Y GND
14 Vcc
13 4G
12 4A
11 4Y
10 3G
9 3A
8 3Y
TC7SH32FU-X (IC312) :
1.Terminal layout
Vcc
5
1
A
2. Truth table
INPUTS OUTPUTS
G A
H X
L L
L H
X: Don't care
Z:High impedance
MX-DVA9/MX-DVA9R
2 Input Single OR Gate
Y
4
2 3
B GND
Y
Z
L
H
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